參數(shù)資料
型號(hào): ST72C171K2B6
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32
封裝: SHRINK, PLASTIC, DIP-32
文件頁數(shù): 15/152頁
文件大?。?/td> 2156K
代理商: ST72C171K2B6
ST72C171
111/152
INSTRUCTION GROUPS (Cont’d)
Mnemo
Description
Function/Example
Dst
Src
H
I
N
Z
C
JRULE
Jump if (C + Z = 1)
Unsigned <=
LD
Load
dst <= src
reg, M
M, reg
N
Z
MUL
Multiply
X,A = X * A
A, X, Y
X, Y, A
0
NEG
Negate (2’s compl)
neg $10
reg, M
N
Z
C
NOP
No Operation
OR
OR operation
A = A + M
A
M
N
Z
POP
Pop from the Stack
pop reg
reg
M
pop CC
CC
M
H
I
N
Z
C
PUSH
Push onto the Stack
push Y
M
reg, CC
RCF
Reset carry flag
C = 0
0
RET
Subroutine Return
RIM
Enable Interrupts
I = 0
0
RLC
Rotate left true C
C <= Dst <= C
reg, M
N
Z
C
RRC
Rotate right true C
C => Dst => C
reg, M
N
Z
C
RSP
Reset Stack Pointer
S = Max allowed
SBC
Subtract with Carry
A = A - M - C
A
M
N
Z
C
SCF
Set carry flag
C = 1
1
SIM
Disable Interrupts
I = 1
1
SLA
Shift left Arithmetic
C <= Dst <= 0
reg, M
N
Z
C
SLL
Shift left Logic
C <= Dst <= 0
reg, M
N
Z
C
SRL
Shift right Logic
0 => Dst => C
reg, M
0
Z
C
SRA
Shift right Arithmetic
Dst7 => Dst => C
reg, M
N
Z
C
SUB
Subtraction
A = A - M
A
M
N
Z
C
SWAP
SWAP nibbles
Dst[7..4] <=> Dst[3..0] reg, M
N
Z
TNZ
Test for Neg & Zero
tnz lbl1
N
Z
TRAP
S/W trap
S/W interrupt
1
WFI
Wait for Interrupt
0
XOR
Exclusive OR
A = A XOR M
A
M
N
Z
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