參數(shù)資料
型號: ST72F60K2DIE1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, UUC
文件頁數(shù): 117/121頁
文件大?。?/td> 2515K
代理商: ST72F60K2DIE1
ST7260
95/117
13.8 I/O PORT PIN CHARACTERISTICS
13.8.1 General Characteristics
Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.
Notes:
1. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see Figure 48). Static peak current value taken at a fixed VIN value,
based on design simulation and technology characteristics, not tested in production. This value depends on VDD and tem-
perature values.
2. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-
scribed in Figure 49).
3. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Figure 48. Two typical Applications with unused I/O Pin
Figure 49. Typ. IPU vs. VDD
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
0.3xVDD
V
VIH
Input high level voltage
0.7xVDD
VIN
Input voltage
True open drain I/O pins
VSS
6.0
V
Other I/O pins
VDD
Vhys
Schmitt trigger voltage hysteresis
400
mV
IL
Input leakage current
VSSVINVDD
±1
A
IS
Static current consumption induced
by each floating input pin 1)
Floating input mode
400
RPU
Weak pull-up equivalent resistor 2)
VIN=VSS
VDD=5 V
50
90
120
k
CIO
I/O pin capacitance
5
pF
tf(IO)out
Output high to low level fall time
CL=50 pF
Between 10% and 90%
25
ns
tr(IO)out
Output low to high level rise time
25
tw(IT)in
External interrupt pulse time 3)
1tCPU
10k
UNUSED I/O PORT
ST72XXX
10k
UNUSED I/O PORT
ST72XXX
VDD
Pull-up current (A)
0
10
20
30
40
50
60
70
80
90
4
4.2
4.4
4.6
4.8
5
5.2
5.4
Vdd (V)
P
u
ll
-u
p
c
u
rr
e
n
t
(
A)
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