參數(shù)資料
型號(hào)： ST72T141K2M6XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO34
封裝： 0.300 INCH, PLASTIC, SO-34
文件頁數(shù)： 98/132頁
文件大?。?/td> 1494K
代理商： ST72T141K2M6XXX
ST72141K
68/132
MOTOR CONTROLLER (Cont’d)
INTERRUPT MASK REGISTER (MIMR)
Read/Write (except bits 7:6)
Reset Value: 0000 0000 (00h)
Bit 7 = HST:
Hysteresis Comparator Value.
This read only bit contains the hysteresis compa-
rator output.
0: Demagnetisation/BEMF comparator is under
VREF
1: Demagnetisation/BEMF comparator is above
VREF
Bit 6 = CL:
Current Loop Comparator Value.
This read only bit contains the current loop compa-
rator output value.
0: Current detect voltage is under VCREF
1: Current detect voltage is above VCREF
Bit 5 = RIM:
Ratio update Interrupt Mask bit.
0: Ratio update interrupts (R+ and R-) disabled
1: Ratio update interrupts (R+ and R-) enabled
Bit 4 = OIM:
Multiplier Overflow Interrupt Mask bit.
0: Multiplier Overflow interrupt disabled
1: Multiplier Overflow interrupt enabled
Bit 3 = EIM:
Emergency stop Interrupt Mask bit.
0: Emergency stop interrupt disabled
1: Emergency stop interrupt enabled
Bit 2 = ZIM:
Back EMF Zero-crossing Interrupt
Mask bit.
0: BEMF Zero-crossing Interrupt disabled
1: BEMF Zero-crossing Interrupt enabled
Bit 1 = DIM:
End of Demagnetization Interrupt
Mask bit.
0: End of Demagnetization interrupt disabled
1: End of Demagnetization interrupt enabled if the
HDM or SDM bit in the MCRB register is set
Bit 0 = CIM:
Commutation Interrupt Mask bit
0: Commutation Interrupt disabled
1: Commutation Interrupt enabled
INTERRUPT STATUS REGISTER (MISR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = Reserved. Forced by hardware to 0.
Bit 6 = RPI:
Ratio Increment interrupt flag.
Autoswitched mode (SWA bit =0):
0: No R+ interrupt pending
1: R+ Interrupt pending
Switched mode (SWA bit =1):
0: No R+ action
1: The hardware will increment the ST[3:0] bits
when the next commutation occurs and shift all
timer registers right.
Bit 5 = RMI:
Ratio Decrement interrupt flag.
Autoswitched mode (SWA bit =0):
0: No R- interrupt pending
1: R- Interrupt pending
Switched mode (SWA bit =1):
0: No R- action
1: The hardware will decrement the ST[3:0] bits
when the next commutation occurs and shift all
timer registers left.
Bit 4 = OI:
Multiplier Overflow interrupt flag.
0: No Multiplier Overflow interrupt pending
1: Multiplier Overflow interrupt pending
Bit 3 = EI:
Emergency stop Interrupt flag.
0: No Emergency stop interrupt pending
1: Emergency stop interrupt pending
Bit 2 = ZI:
BEMF Zero-crossing interrupt flag.
0: No BEMF Zero-crossing Interrupt pending
1: BEMF Zero-crossing Interrupt pending
Bit 1 = DI:
End of Demagnetization interrupt flag.
0: No End of Demagnetization interrupt pending
1: End of Demagnetization interrupt pending
Bit 0 = CI:
Commutation interrupt flag
0: No Commutation Interrupt pending
1: Commutation Interrupt pending
70
HST
CL
RIM
OIM
EIM
ZIM
DIM
CIM
70
0RPI
RMI
OI
EI
ZI
DI
CI
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