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ST7LITE0, ST7SUPERLITE
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INTERRUPTS
(Cont’d)
EXTERNAL INTERRUPT CONTROL REGISTER
(EICR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:6 =
IS3[1:0]
ei3 sensitivity
These bits define the interrupt sensitivity for ei3
(Port B0) according to
Table 8
.
Bit 5:4 =
IS2[1:0]
ei2 sensitivity
These bits define the interrupt sensitivity for ei2
(Port B3) according to
Table 8
.
Bit 3:2 =
IS1[1:0]
ei1 sensitivity
These bits define the interrupt sensitivity for ei1
(Port A7) according to
Table 8
.
Bit 1:0 =
IS0[1:0]
ei0 sensitivity
These bits define the interrupt sensitivity for ei0
(Port A0) according to
Table 8
.
Note:
These 8 bits can be written only when the I
bit in the CC register is set.
Table 8. Interrupt Sensitivity Bits
.
7
0
IS31
IS30
IS21
IS20
IS11
IS10
IS01
IS00
ISx1 ISx0
External Interrupt Sensitivity
0
0
1
1
0
1
0
1
Falling edge & low level
Rising edge only
Falling edge only
Rising and falling edge
1