參數(shù)資料
型號: STPCI2HDYI
廠商: STMICROELECTRONICS
元件分類: 外設及接口
英文描述: MULTIFUNCTION PERIPHERAL, PBGA516
封裝: PLASTIC, BGA-516
文件頁數(shù): 94/109頁
文件大?。?/td> 2430K
代理商: STPCI2HDYI
STPC ATLAS
Issue 1.1 - March 23, 2004
85/109
6.3.7. IDE / ISA DYNAMIC DEMULTIPLEXING
Some of the ISA bus signals are dynamically
multiplexed to optimize the pin count. Figure 6-13
describes how to implement the external glue
logic to demultiplex the IDE and ISA interfaces. In
Local Bus mode the two buffers are not needed
and the NAND gates can be simplified to inverters.
6.3.8. BASIC AUDIO USING IDE INTERFACE
When the application requires only basic audio
capabilities, an audio DAC on the IDE interface
can avoid using a PCI-based audio device(see
Figure 6-14). This low cost solution is not CPU
consuming
thanks
to
the
DMA
controller
implemented in the IDE controller and can
generate 16-bit stereo sound. The clock speed is
programmable when using the speaker output.
Figure 6-13. Typical IDE / ISA Demultiplexing
MASTER#
74xx245
RMRTCCS#
A
B
DIR
OE
ISAOE#
KBCS#
RTCRW#
RTCDS
SA[19:8]
STPC bus / DD[15:0]
LA[22]
LA[23]
LA[20]
LA[21]
SCS1#
SCS3#
PCS1#
PCS3#
Figure 6-14. Basic audio on IDE
74xx74
16
Q
DD[15:0]
D
PR
RST
D[15:0]
CS#
PCS1
WR#
A/B
Audio Out
Right
Left
Stereo DAC
PDRQ
SYSRSTO#
Speaker
PDIOW#
Vcc
STPC
Q
D
PR
RST
Note * : the inverter can be removed when the DAC CS# is directly connected to GND
*
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