- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372394 > SX20AC100SO IC-SM-8-BIT MCU PDF資料下載
參數(shù)資料
| 型號： | SX20AC100SO |
| 元件分類： | 8位微控制器 |
| 英文描述： | IC-SM-8-BIT MCU |
| 中文描述： | 集成電路釤8位微控制器 |
| 文件頁數(shù)： | 10/42頁 |
| 文件大?。?/td> | 312K |
| 代理商： | SX20AC100SO |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
1999 Scenix Semiconductor, Inc. All rights reserved.
- 10 -
www.scenix.com
SX18AC / SX20AC / SX28AC
4.0
The CPU uses a set of special-function registers to con-
trol the operation of the device.
The CPU registers include an 8-bit working register (W),
which serves as a pseudo accumulator. It holds the sec-
ond operand of an instruction, receives the literal in
immediate type instructions, and also can be program-
selected as the destination register.
A set of 31 file registers serves as the primary accumula-
tor. One of these registers holds the first operand of an
instruction and another can be program-selected as the
destination register. The first eight file registers include
the Real-Time Clock/Counter register (RTCC), the lower
eight bits of the 11-bit Program Counter (PC), the 8-bit
STATUS register, three port control registers for Port A,
Port B, Port C, the 8-bit File Select Register (FSR), and
INDF used for indirect addressing.
The five low-order bits of the FSR register select one of
the 31 file registers in the indirect addressing mode. Call-
ing for the file register located at address 00h (INDF) in
any of the file-oriented instructions selects indirect
addressing, which uses the FSR register. It should be
noted that the file register at address 00h is not a physi-
cally implemented register. The CPU also contains an 8-
level, 11-bit hardware push/pop stack for subroutine link-
age.
Table 4-1. Special-Function Registers
SPECIAL-FUNCTION REGISTERS
*In the SX18 package, Port C is not used, and address
07h is available as a general-purpose RAM location.
4.1
PC Register (02h)
The PC register holds the lower eight bits of the program
counter. It is accessible at run time to perform branch
operations.
4.2
STATUS Register (03h)
The STATUS register holds the arithmetic status of the
ALU, the page select bits, and the reset state. The
STATUS register is accessible during run time, except
that bits PD and TO are read-only. It is recommended
that only SETB and CLRB instructions be used on this
register. Care should be exercised when writing to the
STATUS register as the ALU status bits are updated
upon completion of the write operation, possibly leaving
the STATUS register with a result that is different than
intended.
PA2
PA1
PA0
TO
Bit 7
Bit 7-5: Page select bits PA2:PA0
000 = Page 0 (000h – 01FFh)
001 = Page 1 (200h – 03FFh)
010 = Page 2 (400h – 05FFh)
011 = Page 3 (600h – 07FFh)
Bit 4:
Time Out bit, TO
1 = Set to 1 after power up and upon exe-
cution of CLRWDT or SLEEP instructions
0 = A watchdog time-out occurred
Bit 3:
Power Down bit, PD
1= Set to a 1 after power up and upon ex-
ecution of the CLRWDT instruction
0 = Cleared to a ‘0’ upon execution of
SLEEP instruction
Bit 2:
Zero bit, Z
1 = Result of math operation is zero
0 = Result of math operation is non-zero
Bit 1:
Digit Carry bit, DC
After Addition:
1 = A carry from bit 3 occurred
0 = No carry from bit 3 occurred
After Subtraction:
1 = No borrow from bit 3 occurred
0 = A borrow from bit 3 occurred
Bit 0:
Carry bit, C
After Addition:
1 = A carry from bit 7 of the result occured
0 = No carry from bit 7 of the result oc-
cured
After Substraction:
1 = No borrow from bit 7 of the result oc-
cured
0 = A borrow from bit 7 of the result oc-
cured
Rotate (RR or RL) Instructions:
The carry bit is loaded with the low or high
order bit, respectively. When CF bit is
cleared, Carry bit works as input for ADD
and SUB instructions.
Addr
00h
01h
02h
03h
04h
05h
06h
07h
Name
Function
INDF
RTCC
PC
STATUS
FSR
RA
RB
RC*
Used for indirect addressing
Real Time Clock/Counter
Program Counter (low byte)
Holds Status bits of ALU
File Select Register
Port RA Control register
Port RB Control register
Port RC Control register
PD
Z
DC
C
Bit 0
相關PDF資料 |
PDF描述 |
|---|---|
| SXA-1 | Amplifier. Other |
| SXA-2 | Amplifier. Other |
| SXA-3 | Amplifier. Other |
| SXA10-48S05 | DC to DC Converter |
| SXA10-48S12 | DC to DC Converter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SX20AC75 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug |
| SX20AC75-I/DP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug |
| SX20AC75-I/PQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug |
| SX20AC75-I/SO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug |
| SX20AC75-I/SS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug |
發(fā)布緊急采購，3分鐘左右您將得到回復。