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參數(shù)資料
型號(hào): SX8725CWLTDT
廠商: Semtech
文件頁(yè)數(shù): 9/68頁(yè)
文件大?。?/td> 0K
描述: IC DAS ADC 16BIT I2C/SRL
標(biāo)準(zhǔn)包裝: 1
系列: ZoomingADC™
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
輸入類型: 差分
輸出類型: 數(shù)字
接口: I²C
安裝類型: 表面貼裝
封裝/外殼: 12-WDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 12-MLPD-EP(4x4)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: SX8725CWLTDTDKR
www.semtech.com/products/
Page 17
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
SX8725C
ZoomingADC for sensing data acquisition
Revision 1.01
January 2011
Semtech
6.4 Charge Pump
This block generates a supply voltage able to power the analog switch drive levels on the chip higher than VBATT if
necessary.
If VBATT voltage drops below 4.2V then the block should be activated. If VBATT voltage is greater than 4.2V then VBATT
may be switched straight through to the VPUMP output. If the charge pump is not activated then VPUMP = VBATT.
If control input bit MultForceOff = 1 in RegMode (address 0x70) register then the charge pump is disabled and VBATT is
permanently connected to VPUMP output.
If control input bit MultForceOn = 1 in RegMode register then the charge pump is permanently enabled. This overrides
MultForceOff bit in RegMode register.
An external capacitor is required on VPUMP pin. This capacitor should be large enough to ensure that generated
voltage is smooth enough to avoid affecting conversion accuracy but not so large that it gives an unacceptable settling
time. A recommended value is around 2.2nF.
6.5 RC Oscillator
This block provides the master clock reference for the chip. It produces a clock at 4 MHz which is divided internally in
order to generate the clock sources needed by the other blocks.
The oscillator technique is a low power relaxation design and it is designed to vary as little as possible over
temperature and supply voltage.
This oscillator is trimmed at manufacture chip test.
The RC oscillator will start up after a chip reset to allow the trimming values to be read and calibration registers and I2C
address set to their default fused values. Once this has been done, the oscillator will be shut down and the chip will
enter a sleep state while waiting for an I2C communication.
The worst case duration from reset ( or POR ) to the sleep state is 800us.
6.5.1 Wake-up from sleep
When the device is in sleep state, the RC oscillator will start up after a communication. The start up sequence for the RC
oscillator is 450us in worst case.
During this time, the internal blocs using the RC can not be used: no ADC conversion can be started.
Not
Recommended
for
New
Designs
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