SYNCHRONOUS EQUIPMENT
LOW INPUT/ HIGH DUAL OUTPUT FREQUENCY CLOCK/SYNCHRONIZER
SY02-HP2O
DESCRIPTION
The SY02-HP2O is a High Frequency Phase Lock Loop has been designed as a module level subsystem for easy
incorporation into telecommunication equipment. The module generates the high frequency (up to 800.00MHz) output
from a low jitter VCXO or VCSO (SAW based oscillators). The SY02-HP2O can be locked to one reference of a pre-
selected input frequency between 8 kHz to 77.76MHz. The module has fast locking time and tolerates reference
inputs with different duty cycles. The loop bandwidth is optimized according to used VCXO and wanted output
performance. The SMD package dimensions are 0.75x1.20 inch and power supply is 3.3V. Parts are assembled using
high temperature solder to withstand surface mount reflow process.
PIN DESCRIPTION
Name
Description
RALTRON ELECTRONICS CORP.
§
10651 N.W.19
th
St
§
Florida 33172
§
U.S.A.
Tel: 305 593-6033
§
Fax: 305-594-3973
§
e-mail: sales@raltron.com
§
Internet: http://www.raltron.com
2
Signal Technology
VL
Typ
-----
VH/ DC Voltage
Typ
------
Min
-----
Max
----
Min
------
Max
------
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
**18
1
2
NC
REF IN
TDO
GND
OUT 1
OUT 1
Vcc
GND
NC
NC
OUT 2
OUT 2
GND
GND
Vcc
TDI
TCK
TMS
J-TAG port for factory usage –
TMS
Ground
Not Connected
-----
(3.HCMOS
-----
0
-----
(0.5
----
(4.5
------
----
----
**3
4
5
6
7
8
9
10
11
12
13
14
15
**16
**17
**18
TMS
-----
-----
------
------
-----
-----
-----
----
------
------
------
LV/PECL
Vcc-1.680
Vcc-1.620
Vcc-1.560
Vcc-1.085
Vcc-1.025
Vcc-0.885
LV/PECL
Vcc-1.680
Vcc-1.620
Vcc-1.560
Vcc-1.085
Vcc-1.025
Vcc-0.885
(3.3V)
-----
(4.5
------
(5.0
------
(5.25
------
-----
-----
----
-----
-----
-----
----
------
------
------
-----
-----
-----
----
------
------
------
LV/PECL
Vcc-1.680
Vcc-1.620
Vcc-1.560
Vcc-1.085
Vcc-1.025
Vcc-0.885
LV/PECL
Vcc-1.680
Vcc-1.620
Vcc-1.560
Vcc-1.085
Vcc-1.025
Vcc-0.885
-----
-----
-----
----
------
------
------
-----
-----
-----
----
------
------
------
3.3V
2.97
3.3
3.465
-----
-----
-----
----
------
------
------
-----
-----
-----
----
------
------
------
-----
-----
-----
----
------
------
------
-----
-----
-----
----
------
------
------
19
20
GND
NC
-----
-----
-----
----
------
------
------
-----
-----
-----
----
------
------
------
**
Do not Connect Pin
LOOP
FILTER
VCXO
MUX,
FPD,
Counter
s &
Logic
OUT 1
J-TAG PORT
REF IN
LVPECL
DIVIDER
OUT 2
OUT 1
OUT 2