參數(shù)資料
型號(hào): SY101422-7JCSTR
廠商: MICREL INC
元件分類: SRAM
英文描述: 256 X 4 STANDARD SRAM, 7 ns, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 3/10頁(yè)
文件大?。?/td> 404K
代理商: SY101422-7JCSTR
3
SY10422-3/4/5/7
SY100422-3/4/5/7
SY101422-3/4/5/7
Parameter
Symbol Min.
Typ.
Max.
Unit
Supply Voltage
(1)
Case Temperature
Supply Voltage
(1)
Case Temperature
Supply Voltage
(1)
Case Temperature
10K
V
EE
T
C
–5.46
0
–5.2
–4.94
75
V
°
C
V
°
C
V
°
C
100K
V
EE
T
C
–4.8
0
–4.5
–4.2
85
101K
V
EE
T
C
–5.46
0
–5.2
–4.94
85
NOTE:
1. Referenced to V
CC
.
FUNCTIONAL DESCRIPTION
The Synergy SY10/100/101422 are 1024-bit RAMs
organized as four 256-by-1-bit blocks with each block having
its own Block Select (BS) control signal that functions
essentially like a unique chip select for the Block. The four
blocks and Block Selects together make the device a 256 x
4-bit RAM. Memory cell selection is achieved by using the
8 address bits designated as A
0
through A
7
. Each of the 2
8
possible input address combinations corresponds to a unique
word location in memory. The active low Block Select (BS)
control signals are provided for memory expansion and for
independent control of each of the four 256 x 1-bit blocks of
memory. The active low Write Enable (WE) controls the
read and write operation on the selected block or blocks.
Data resident on the D
IN
inputs (DI
0
through DI
3
) is written
into the addressed location only when WE and the Block
Select (BS) associated with each of the D
IN
bits is held
LOW. This allows control of the Write operation to any one,
two, three or all four of the input data bits. In order to
perform a read operation, WE is held high, the Block Select
(BS) associated with each of the four output blocks is held
low, and the non-inverted output data at the addressed
location is transferred to D
OUT
(DO
0
through DO
3
) to be
read out. This allows control of the Read operation to any
one, two, three or all four of the output blocks. Open emitter
outputs are provided for maximum flexibility and memory
expansion by allowing output wire-OR connections. External
termination of 50
to –2.0V or an equivalent circuit must be
used to provide the specified output levels.
All outputs are forced to a logic LOW level when the
RAM is being written into (WE = LOW). The output (or
outputs) associated with a block (or blocks) of memory can
be forced to a logic LOW low level by deselecting that block
(or blocks) with its respective Block Select input (BS
0
– BS
3
= HIGH).
ABSOLUTE MAXIMUM RATINGS
(1)
GUARANTEED OPERATING CONDITIONS
Symbol
Rating
Value
Unit
V
EE
V
EE
Pin Potential
to V
CC
Pin
+0.5 to –7.0
V
V
IN
I
OUT
Input Voltage
DC Output Current
(Output High)
+0.5 to V
EE
–30
V
mA
T
C
Temperature Under
Bias
–55 to +125
°
C
T
store
Storage Temperature
–65 to +150
°
C
NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS
are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections
of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions
for extended periods may affect device reliability.
RISE AND FALL TIME
Parameter
Code
(1)
Symbol Min. Typ. Max.
Unit
Output Rise Time
F
S
t
r
500
1500
ps
Output Fall Time
F
S
t
f
500
1500
ps
NOTE:
1. F = Fast Edge Rate
S = Standard Edge Rate
Parameter
Symbol
Min.
Typ.
Max.
Unit
Input Pin
Capacitance
C
IN
4
pF
Output Pin
Capacitance
C
OUT
5
pF
CAPACITANCE
SEMICONDUCTOR
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