參數(shù)資料
型號(hào): SY10EP33VZG
廠商: Micrel Inc
文件頁(yè)數(shù): 1/11頁(yè)
文件大?。?/td> 0K
描述: IC DIVIDER /4 3.3/5V 8-SOIC
標(biāo)準(zhǔn)包裝: 95
系列: 10EP
邏輯類型: 除以 4
元件數(shù): 1
每個(gè)元件的位元數(shù): 1
復(fù)位: 異步
計(jì)數(shù)速率: 4GHz
觸發(fā)器類型: 正,負(fù)
電源電壓: 3.3 V ~ 5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1087 (CN2011-ZH PDF)
其它名稱: 576-2519
SY10EP33VZG-ND
SY10EP33V/SY100EP33V
5V/3.3V, 4GHz,
÷4 PECL/LVPECL Divider
Precision Edge
ECL Pro is a trademark of Micrel, Inc
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (
408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
December 2010
M9999-121010
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY10/100EP33V is an integrated
÷4 divider.
The VBB pin, an internally-generated voltage supply, is
available to this device only. For single-ended input
conditions, the unused differential input is connected to
VBB as a switching reference voltage. VBB may also rebias
AC-coupled inputs. When used, decouple VBB to VCC via a
0.01F capacitor and limit current sourcing or sinking to
0.5mA. When not used, VBB should be left open.
The reset pin is asynchronous and is asserted on the
rising edge. Upon power-up, the internal flip-flops will
attain a random state; the reset allows for the synchronous
use of multiple EP33s in a system.
The
100K
Series
includes
internal
temperature
compensation circuitry.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
ECL Pro
Features
Guaranteed maximum frequency >4GHz
3.3V and 5V power supply options
Guaranteed propagation delay <460ps over temperature
Internal 75k input pull-down resistors
Wide operating temperature range (40°C to +85°C)
Available in 8-pin MSOP and SOIC packages
___________________________________________________________________________________________________________
Pin Configuration
Top View
(Available in MSOP or SOIC Package)
Pin Description
Pin Number
Pin Function
CLK, /CLK
ECL Clock Inputs with Internal 75k Pull-Down Transistor. Default State is LOW
RESET
ECL Asynchronous Reset
VBB
Reference Voltage Output
Q, /Q
ECL Data Outputs
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