Absolute Maximum Ratings (1)
參數(shù)資料
型號: SY58051UMG
廠商: Micrel Inc
文件頁數(shù): 6/10頁
文件大?。?/td> 0K
描述: IC GATE CML UNIV I/O TERM 16MLF
標(biāo)準(zhǔn)包裝: 100
系列: SY58
邏輯類型: 可配置多功能
電路數(shù): 1
輸入數(shù): 2
施密特觸發(fā)器輸入:
輸出類型: 差分
電源電壓: 2.3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 托盤
產(chǎn)品目錄頁面: 1089 (CN2011-ZH PDF)
其它名稱: 576-1398
Micrel, Inc.
SY58051U-A
July 2011
5
M9999-071311U-A
hbwhelp@micrel.com
Absolute Maximum Ratings (1)
Supply Voltage (VCC).......................................0.5 to +4.0V
Input Voltage (VIN).............................................-0.5V to VCC
CML Output Voltage (VOUT)......... VCC to -1.0V to VCC +0.5V
Termination Current
(3)
Source or Sink Current on VTA
, V
TB
, V
TS ................±60mA
Input Current
Source or Sink Current on A, /A, B, /B, S, /S .........±30mA
Lead Temperature (soldering, 20 sec.).................... +260°C
Storage Temperature (TS.).........................-65°C to +150°C
Operating Ratings (2)
Supply Voltage (VCC)....................... +2.375V to +2.625V
or +3.0°C to +85°C
Ambient Temperature (TA)..................... 40°C to +85°C
Package Thermal Resistance
(4)
PDIP (
θJA)
Still-Air.................................................... 61°C/W
QFN (ψJB)............................................................ 38°C/W
DC Electrical Characteristics (5)
TA = —40°C to +85°C, unless otherwise noted.
or (408) 955-1690
Notes:
1.
Permanent device damage may occur if the ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and
functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute
maximum ratings conditions for extended periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Due to the limited drive capability use for input of the same package only.
4.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. ΨJB uses 4-layer
θJA n still-air, unless otherwise stated.
5.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6.
Due to the internal termination (see Figure 1a) the input current depends on the applied voltages at A, /A and VTA inputs, the B, /B and VTB inputs or
the S, /S and VTS inputs. Do not apply a combination of voltages that causes the input current to exceed the maximum limit.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VCC
Power Supply
VCC = 2.5V.
VCC = 3.3V.
2.375
3.0
2.5
3.3
2.625
3.6
V
ICC
Power Supply Current
No Load, max.
VCC.
55
70
mA
RDIFF_IN
Differential Input Resistance
(A-to/A, B-to-/B or S-to/S)
80
100
120
RIN
Input Resistance
(A-to-VTA, B-to-VTB or S-to-VTS)
40
50
60
VIH
Input HIGH Voltage
(A, /A or B, /B or S, /S)
Note 6
1.2
VCC
V
VIL
Input LOW Voltage
(A, /A or B, /B or S, /S)
Note 6
0
VIH-0.1
mV
VIN
Input Voltage Swing
(A, /A or B, /B or S, /S)
Note 6
See Figure 2a.
100
mV
VDIFF_IN
Differential Input Voltage Swing
A-, /A or B-, /B or S-, /S
Note 6
See Figure 2b.
200
mV
IN
Input Current
(A, /A or B, /B or S, /S)
Note 6
21
mA
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