參數(shù)資料
型號(hào)： SY87700ALHG TR
廠商： Micrel Inc
文件頁(yè)數(shù)： 2/16頁(yè)
文件大?。?/td> 0K
描述： IC CLOCK/DATA RECOVERY 32-TQFP
標(biāo)準(zhǔn)包裝： 1,000
系列： AnyRate®
類(lèi)型： 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器
PLL： 是
主要目的： 以太網(wǎng)，SONET/SDH，ATM 應(yīng)用
輸入： PECL
輸出： PECL
電路數(shù)： 1
比率 - 輸入:輸出： 1:3
差分 - 輸入:輸出： 是/是
頻率 - 最大： 208Mbps
電源電壓： 3.15 V ~ 3.45 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 32-EPAD-TQFP
包裝： 帶卷 (TR)
其它名稱(chēng)： SY87700ALHGTR
SY87700ALHGTR-ND
MCP7940N
DS25010C-page 10
2011 Microchip Technology Inc.
5.0
RTCC FUNCTIONALITY
The MCP7940N family is a highly integrated RTCC.
On-board time and date counters are driven from a low-
power oscillator to maintain the time and date. An
integrated VCC switch enables the device to maintain
the time and date and also the contents of the SRAM
during a VCC power failure.
5.1
RTCC MEMORY MAP
The RTCC registers are contained in addresses
0x00h-0x1fh. 64 bytes of user-accessable SRAM are
located in the address range 0x20-0x5f. The SRAM
memory is a separate block from the RTCC control
and Configuration registers. All SRAM locations are
battery-backed-up during a VCC power fail. Unused
locations are not accessible, MCP7940N will noACK
after the address byte if the address is out of range, as
shown in the shaded region of the memory map in
Figure 5-1. The shaded areas are not implemented
and read as ‘0’. No error checking is provided when
loading time and date registers.
Addresses 0x00h-0x06h are the RTCC Time and
Date registers. These are read/write registers.
Care must be taken when accessing these regis-
ters while the oscillator is running.
Incorrect data can appear in the Time and Date
registers if a write is attempted during the time
frame where these internal registers are being
incremented. The user can minimize the likeli-
hood of data corruption by ensuring that any
writes to the Time and Date registers occur before
the contents of the second register reach a value
of 0x59H.
Addresses 0x07h-0x09h are the device Configu-
ration and Calibration.
Addresses 0x0Ah-0x10h are the Alarm 0 regis-
ters. These are used to set up the Alarm 0, the
Interrupt polarity and the Alarm 0 compare.
Addresses 0x11h-0x17h are the same as 0x0Bh-
0x11h but are used for Alarm 1.
Addresses 0x18h-0x1Fh are used for the time-
stamp feature.
The detailed memory map is shown in Table 5-1.
FIGURE 5-1:
MEMORY MAP
0x00
0x06
Time and Date
Configuration and Calibration
Alarm 0
Alarm 1
Time-Stamp
SRAM (64 Bytes)
0x07
0x09
0x0A
0x10
0x11
0x17
0x18
0x1F
0x20
0x5F
0x60
0xFF
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