參數(shù)資料
型號(hào): SY87701ALZG TR
廠商: Micrel Inc
文件頁(yè)數(shù): 7/15頁(yè)
文件大小: 0K
描述: IC CLOCK/DATA RECOVERY 28-SOIC
標(biāo)準(zhǔn)包裝: 1,000
系列: AnyRate®
類型: 時(shí)鐘和數(shù)據(jù)恢復(fù)(CDR),多路復(fù)用器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,ATM 應(yīng)用
輸入: PECL
輸出: PECL
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.3Gbps
電源電壓: 3.15 V ~ 3.45 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC
包裝: 帶卷 (TR)
其它名稱: SY87701ALZGTR
SY87701ALZGTR-ND
2011 Microchip Technology Inc.
DS25009C-page 15
MCP7940X
5.2.2
CALIBRATION
The MCP7940X utilizes digital calibration to correct for
inaccuracies of the input clock source (either external
or crystal). Calibration is enabled by setting the value
of the Calibration register at address 08H. Calibration
is achieved by adding or subtracting a number of input
clock cycles per minute in order to achieve ppm level
adjustments in the internal timing function of the
MCP7940X.
The MSB of the Calibration register is the sign bit, with
a ‘1’ indicating subtraction and a ‘0’ indicating addition.
The remaining seven bits in the register indicate the
number of input clock cycles (multiplied by two) that
are subtracted or added per minute to the internal
timing function.
The internal timing function can be monitored using
the MFP open-drain output pin by setting bit [6]
(SQWE) and bits [2:0] (RS2, RS1, RS0) of the control
register at address 07H. Note that the MFP output
waveform is disabled when the MCP7940X is running
in VBAT mode. With the SQWE bit set to ‘1’, there are
two methods that can be used to observe the internal
timing function of the MCP7940X:
A. RS2 BIT SET TO ‘0’
With the RS2 bit set to ‘0’, the RS1 and RS0 bits
enable the following internal timing signals to be
output on the MFP pin:
The frequencies listed in the table presume an input
clock source of exactly 32.768 kHz. In terms of the
equivalent number of input clock cycles, the table
becomes:
With regards to the calibration function, the Calibration
register setting has no impact upon the MFP output
clock signal when bits RS1 and RS0 are set to ‘11’.
The setting of the Calibration register to a non-zero
value (i.e., values other than 00H or 80H) enables the
calibration function which can be observed on the
MFP output pin. The calibration function can be
expressed in terms of the number of input clock cycles
added/subtracted from the internal timing function.
With bits RS1 and RS0 set to ‘00’, the calibration
function can be expressed as:
Since the calibration is done once per minute (i.e.,
when the internal minute counter is incremented), only
one cycle in sixty of the MFP output waveform is
affected by the calibration setting. Also note that the
duty cycle of the MFP output waveform will not
necessarily be at 50% when the calibration setting is
applied.
With bits RS1 and RS0 set to ‘01’ or ‘10’, the
calibration function can not be expressed in terms of
the input clock period. In the case where the MSB of
the Calibration register is set to ‘0’, the waveform
appearing at the MFP output pin will be “delayed”,
once per minute, by twice the number of input clock
cycles defined in the Calibration register. The MFP
waveform will appear as:
FIGURE 5-2:
RS1 AND RS0 WITH AND WITHOUT CALIBRATION
RS2
RS1
RS0
Output Signal
00
0
1 Hz
00
1
4.096 kHz
01
0
8.192 kHz
01
1
32.768 kHz
RS2
RS1
RS0
Output Signal
00
0
32768
00
1
8
01
0
4
01
1
Toutput
=
(32768 +/- (2 * CALREG)) Tinput
where:
Toutput
=
clock period of MFP output signal
Tinput
=
clock period of input signal
CALREG
=
decimal value of Calibration
register setting and the sign is
determined by the MSB of
Calibration register.
Delay
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