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參數(shù)資料
| 型號(hào)： | SY877021 |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | 3.3V 28Mbps-2.5Gbps AnyRate Clock and Data Recovery(用于數(shù)據(jù)傳輸速率為28Mbps到2.5Gbps的時(shí)鐘恢復(fù)和數(shù)據(jù)重定時(shí)電路) |
| 中文描述： | 3.3 28Mbps - 2.5Gbps的AnyRate時(shí)鐘和數(shù)據(jù)恢復(fù)（用于數(shù)據(jù)傳輸速率為28Mbps到2.5Gbps的的時(shí)鐘恢復(fù)和數(shù)據(jù)重定時(shí)電路） |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大?。?/td> | 151K |
| 代理商： | SY877021 |
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DESCRIPTION
FEATURES
PRELIMINARY
SY87702L
I
3.3V power supply
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Complies with Bellcore, ITU/CCITT and ANSI
specifications for applications such as OC-1, OC-3,
OC-12, OC-48*, and ATM
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Compatible with FDDI, Gigabit Ethernet, Fibre
Channel, 2X Fibre Channel, SMPTE 259 and 292, and
proprietary applications
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Low power
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Clock and data recovery from 28Mbps up to 2.5Gbps
NRZ data stream
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Selectable reference frequencies via programmable
multiplier
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Differential PECL and CML high-speed serial outputs
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Line receiver input: no external buffering needed
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Link fault indication
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100K ECL compatible I/O
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Available in 64-Pin EP-TQFP package
The SY87702L is a complete Clock Recovery and Data
retiming integrated circuit for data rates from 28Mbps up to
2.5Gbps NRZ. The device is ideally suited for SONET/SDH/
ATM, Fibre Channel, and Gigabit Ethernet applications, as
well as other high-speed data transmission applications.
Clock recovery and data retiming is performed by
synchronizing the on-chip VCO directly to the incoming data
stream. The VCO center frequency is controlled by the
reference clock frequency and the selected divide ratio. On-
chip clock generation is performed through the use of a
frequency multiplier PLL and can be used as a Clock
Multiplier Unit (CMU). The integrated CMU can provide this
clock signal at the TCLK outputs. Additionally, the TCLK
output can be selected to provide a copy of the RCLK
frequency.
For SONET/SDH applications, the SY87702L includes a
Link Fault Detection circuit. This circuit, enabled by the output
of an optical module driving the CD input low, causes the
recovery PLL of the SY87702L to lock to the reference
clock's multiplied frequency under Loss-of-Signal conditions.
This low jitter clock is provided at the RCLK outputs and is
at the same frequency as that provided at the TCLK output.
3.3V 28Mbps-2.5Gbps AnyRate
CLOCK AND DATA RECOVERY
1
Rev.: A
Issue Date: July 2000
Amendment: /1
APPLICATIONS
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Transponders and section repeaters
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Multiplexer's: access, add drop (ADM), and terminal
(TM)
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SONET/SDH/ATM: -based transmission systems,
modules, and test equipment
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Terabit routers and broadband cross-connects
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Fibre optic test equipment
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HDTV switching and transmission
*Meets OC-48 Jitter Tolerance and Transfer
AnyRate is a trademark of Micrel, Inc.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY87702L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AnyRate? CDR |
| SY87702L_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY |
| SY87702LHG | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY |
| SY87702LHGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY |
| SY87702LHI | 功能描述:IC CLOCK/DATA RECOVERY 64-TQFP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:AnyRate® 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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