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參數(shù)資料
| 型號： | SYS32256LK-020 |
| 元件分類： | SRAM |
| 英文描述： | 256K X 32 MULTI DEVICE SRAM MODULE, 20 ns, SMA64 |
| 封裝： | PLASTIC, SIMM-64 |
| 文件頁數(shù)： | 6/7頁 |
| 文件大?。?/td> | 114K |
| 代理商： | SYS32256LK-020 |
ISSUE 1.7 January 1999
SYS32256ZK/LK - 020/25/30/35
6
CW
WR
WC
AS
DW
DH
OH
OW
WHZ
AW
WP
Don't
t
Address
CS
WE
Dout
Din
t
Care
High-Z
Data Retention Waveform
Write Cycle No.2 Timing Waveform
t R
tCDR
4.5V
2.2V
4.5V
2.2V
0V
DATA RETENTION MODE
Vcc
CS
V DR
CS > Vcc -0.2V
AC Characteristics Notes
(1) WE is High for Read Cycle.
(2) All read cycle timing is referenced from the last valid address to the first transition address.
(3) At any given temperature and voltage condition, tCHZ (max) is less than tCLZ (min) both for a given module
and from module to module.
(4) Module is continuously selected with CS = VIL.
(5) Address is valid prior to or coincident with CS transition low.
(6) A write occurs during the overlap (tWP) of a low CS and a low WE.
(7) All write cycle timing is referenced from the last valid address to the first transition address.
(8) Defined as the time at which the outputs achieve open circuit conditions and are not referenced to output
voltage levels. These parameters are sampled and not 100% tested.
(9) At any given temperature and voltage condition, tWHZ (max) is less than tOW (min) both for a given module
and from module to module.
(10) CS or WE must be high during address transition.
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| SYS32256LK-12 | 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:256K x 32 SRAM MODULE |
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| SYS32256LK-17 | 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:256K x 32 SRAM MODULE |
| SYS32256LKI-12 | 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:256K x 32 SRAM MODULE |
| SYS32256LKI-15 | 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:256K x 32 SRAM MODULE |
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