參數(shù)資料
型號(hào): T15V2M16B-70C
廠(chǎng)商: TM Technology, Inc.
英文描述: 128K X 16 LOW POWER CMOS STATIC RAM
中文描述: 128K的× 16低功耗CMOS靜態(tài)RAM
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 93K
代理商: T15V2M16B-70C
TE
CH
tm
SRAM
FEATURES
Access time : 45/55/70/100 ns
Low-power consumption
-
Active: 5mA (I
CC1
)
-
Stand-by: (CMOS input/output)
Max.. 15 uA for 55/70/100ns
Max.. 40 uA for 45ns
Equal access and cycle time
Single +2.7V to 3.6V Power Supply
TTL compatible , Tri-state output
Common I/O capability
Automatic power-down when deselected
Available in 44-PIN TSOP-II and 48-pin CSP
packages
Operating temperature :
-
-10 ~ +70
°
C
-
-40 ~ +85
°
C
PART NUMBER EXAMPLES
T15V2M16B
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: NOV. 2002
Revision:A
128K X 16 LOW POWER
CMOS STATIC RAM
PART NUMBER
PACKAGE
Temperature
-10 ~ +70
°
C
-10 ~ +70
°
C
-40 ~ +85
°
C
-40 ~ +85
°
C
T15V2M16B-55S
TSOP-II
T15V2M16B-70C
CSP
T15V2M16B-55SI
TSOP-II
T15V2M16B-70CI
CSP
GENERAL DESCRIPTION
The T15V2M16B is a very Low Power CMOS
Static RAM organized as 131,072 words by 16
bits . This device is fabricated by high
performance CMOS technology. It can be operated
under wide power supply voltage range from
+2.7V to +3.6V.
The T15V2M16B inputs and three-state
outputs are TTL compatible and allow for direct
interfacing with common system bus structures.
Data retention is guaranteed at a power supply
voltage as low as 2V.
BLOCK DIAGRAM
DECODER
A0
A16
I/O16
Vcc
Vss
DATA I/O
CORE
ARRAY
I/O1
.
.
WE
OE
LB
CE
CONTROL
CIRCUIT
UB
.
.
.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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