參數(shù)資料
型號(hào)： T7237A
英文描述： Compliance with the New ETSI PSD Requirement
中文描述： 符合新的ETSI PSD的要求
文件頁數(shù)： 29/116頁
文件大?。?/td> 1056K
代理商： T7237A
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
Lucent Technologies Inc.
25
Microprocessor Interface Description
(continued)
Registers
(continued)
Table 7. Data Flow Control—U and S/T B Channels (Address 03h)
Reg
DFR0
Default State on RESET
R/W
R/W
Bit 7
SXB21
1
Bit 6
SXB20
1
Bit 5
SXB11
1
Bit 4
SXB10
1
Bit 3
UXB21
1
Bit 2
UXB20
1
Bit 1
UXB11
1
Bit 0
UXB10
1
Register
DFR0
Bit
1—0
Symbol
UXB1[1:0]
Name/Description
U-Interface Transmit Path Source for B1 Channel.
Refer to point #1
in Figure 16.
00—Not used.
01—TDM bus.
10—All 1s.
11—S/T-interface receive (default).
U-Interface Transmit Path Source for B2 Channel.
Refer to point #1
in Figure 16.
00—Not used.
01—TDM bus.
10—All 1s.
11—S/T-interface receive (default).
S/T-Interface Transmit Path Source for B1 Channel.
Refer to point #2
in Figure 16.
00—Not used.
01—TDM bus.
10—S/T-interface receive (ITU-T I.430 Loop C for B1 channel).
11—U-interface receive (default).
S/T-Interface Transmit Path Source for B2 Channel.
Refer to point #2
in Figure 16.
00—Not used.
01—TDM bus.
10—S/T-interface receive (ITU-T I.430 Loop C for B2 channel).
11—U-Interface receive (default).
DFR0
3—2
UXB2[1:0]
DFR0
5—4
SXB1[1:0]
DFR0
7—6
SXB2[1:0]
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