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Lucent Technologies Inc.
31
Data Sheet
February 1999
Codec Chip Set
T7531A/T7536 16-Channel Programmable
Timing Characteristics
(continued)
Table 17. Serial Control Port Timing
(See Figure 10.)
5-4232a (F)
Notes:
UPDI and UPCS change at the rising edge of UPCK by the microprocessor and are sampled at the falling edge of UPCK by the DSP
UPDO changes at the rising edge of UPCK by the DSP and is sampled at the falling edge of UPCK by the microprocessor.
Figure 10. Timing Diagram for Microprocessor Write/Read to/from the DSP on the Control Interface
Symbol
tCSHLSET
tCSLHHOD
tUPDIST
tUPDIHD
tUPDODEL
tUPDOHZDL
tCKCSH
Parameter
Test Conditions
—
—
—
—
C
L
= 50 pF
C
L
= 50 pF
Min
25
20 ns
25
20
—
—
Typ
—
—
—
—
—
—
Max
—
Unit
ns
—
ns
ns
ns
ns
UPCS
to UPCK Setup
UPCS
to UPCK Hold
UPDI to UPCK Setup
UPDI to UPCK Hold
UPCK to UPDO Delay
UPCS
to UPDO High-Z
Duration of UPCK and
UPCS
High:
Write Cycle
Read Cycle
Duration of UPCK and
UPCS
High
UPCK Period/2
—
—
42
34
—
—
—
1
9
9
—
—
—
—
—
—
μ
s
μ
s
μ
s
tCKCSH1
tCSHLSET
tCSLHHOD
tUPDOHZDL
0
13—1
14
15
0
13—1
14
15
tUPDIHD
DATA (16 bits)
tUPDODEL
0
1
13—2
14
15
tUPDIST
tUPDIHD
ADDRESS (16 bits)
UPDI
UPDO
UPCS
UPCK
HIGH-Z STATE
DATA (16 bits)
tCKCSH
ADDRESS
tCKCSH1