參數(shù)資料
型號(hào)： T89C51CC01UA-SLSIM
廠商： Atmel
文件頁(yè)數(shù)： 4/123頁(yè)
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 32K 44PLCC
標(biāo)準(zhǔn)包裝： 27
系列： AT89C CAN
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： CAN，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大小： 2K x 8
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
配用： AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN
其它名稱(chēng)： T89C51CC01UASLSIM
第1頁(yè)第2頁(yè)第3頁(yè)當(dāng)前第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)
2010 Microchip Technology Inc.
DS41303G-page 101
PIC18F2XK20/4XK20
7.3
Reading the Data EEPROM
Memory
To read a data memory location, the user must write
the address to the EEADR register, clear the EEPGD
control bit of the EECON1 register and then set control
bit, RD. The data is available on the very next instruc-
tion cycle; therefore, the EEDATA register can be read
by the next instruction. EEDATA will hold this value until
another read operation, or until it is written to by the
user (during a write operation).
The basic process is shown in Example 7-1.
7.4
Writing to the Data EEPROM
Memory
To write an EEPROM data location, the address must
first be written to the EEADR register and the data writ-
ten to the EEDATA register. The sequence in
Example 7-2 must be followed to initiate the write cycle.
The write will not begin if this sequence is not exactly
followed (write 55h to EECON2, write 0AAh to
EECON2, then set WR bit) for each byte. It is strongly
recommended that interrupts be disabled during this
code segment.
Additionally, the WREN bit in EECON1 must be set to
enable writes. This mechanism prevents accidental
writes to data EEPROM due to unexpected code
execution (i.e., runaway programs). The WREN bit
should be kept clear at all times, except when updating
the EEPROM. The WREN bit is not cleared by
hardware.
After a write sequence has been initiated, EECON1,
EEADR and EEDATA cannot be modified. The WR bit
will be inhibited from being set unless the WREN bit is
set. Both WR and WREN cannot be set with the same
instruction.
At the completion of the write cycle, the WR bit is
cleared by hardware and the EEPROM Interrupt Flag
bit, EEIF, is set. The user may either enable this
interrupt or poll this bit. EEIF must be cleared by
software.
7.5
Write Verify
Depending on the application, good programming
practice may dictate that the value written to the
memory should be verified against the original value.
This should be used in applications where excessive
writes can stress bits near the specification limit.
EXAMPLE 7-1:
DATA EEPROM READ
EXAMPLE 7-2:
DATA EEPROM WRITE
MOVLW
DATA_EE_ADDR
;
MOVWF
EEADR
; Data Memory Address to read
BCF
EECON1, EEPGD
; Point to DATA memory
BCF
EECON1, CFGS
; Access EEPROM
BSF
EECON1, RD
; EEPROM Read
MOVF
EEDATA, W
; W = EEDATA
MOVLW
DATA_EE_ADDR_LOW
;
MOVWF
EEADR
; Data Memory Address to write
MOVLW
DATA_EE_ADDR_HI
;
MOVWF
EEADRH
;
MOVLW
DATA_EE_DATA
;
MOVWF
EEDATA
; Data Memory Value to write
BCF
EECON1, EEPGD
; Point to DATA memory
BCF
EECON1, CFGS
; Access EEPROM
BSF
EECON1, WREN
; Enable writes
BCF
INTCON, GIE
; Disable Interrupts
MOVLW
55h
;
Required
MOVWF
EECON2
; Write 55h
Sequence
MOVLW
0AAh
;
MOVWF
EECON2
; Write 0AAh
BSF
EECON1, WR
; Set WR bit to begin write
BSF
INTCON, GIE
; Enable Interrupts
; User code execution
BCF
EECON1, WREN
; Disable writes on write complete (EEIF set)
相關(guān)PDF資料
PDF描述
T89C51CC01UA-RLTIM IC 8051 MCU FLASH 32K 44VQFP
T89C51CC01CA-SLSIM IC 8051 MCU FLASH 32K 44PLCC
T89C51CC01CA-RLTIM IC 8051 MCU FLASH 32K 44VQFP
AT91M55800A-33CI IC ARM MCU 33MHZ 176-BGA
10FMN-BMTR-A-TB CONN FMN HSNG 10POS SGL REV SMD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T89C51CC02 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:Enhanced 8-bit Microcontroller with CAN Controller and Flash
T89C51CC02_03 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:CAN Microcontrollers
T89C51CC02_0305 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:Enhanced 8-bit Microcontroller with CAN Controller and Flash Memory
T89C51CC02_0312 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:CAN Microcontrollers
T89C51CC02_06 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:Enhanced 8-bit Microcontroller with CAN Controller and Flash
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*