參數(shù)資料
型號: T89C51RD2-SLRCM
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 0 to 40 MHz Flash Programmable 8-bit Microcontroller
中文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 55/104頁
文件大?。?/td> 798K
代理商: T89C51RD2-SLRCM
55
T89C51RD2
4243G
8051
05/03
Boot Loader Lock Bit (BLLB)
One bit of the HSB is used to secure by hardware the internal boot loader sector against
software reprogramming.
When the BLLB is cleared, any attempt to write in the boot loader segment (Address
FC00h to FFFFh) will have no effect. This protection applies for software writing only.
Boot Loader Jump Bit (BLJB)
One bit of the HSB, the BLJB bit, is used to force the boot address:
When this bit is set the boot address is 0000h.
When this bit is reset the boot address is FC03h. By default, this bit is cleared and
the ISP is enabled.
Flash memory lock bits
The three lock bits provide different levels of protection for the on-chip code and data,
when programmed according to Table 29.
7
6
5
4
3
2
1
0
SB
BLJB
BLLB
-
-
LB2
LB1
LB0
Bit
Number
Bit
Mnemonic
Description
7
SB
Safe Bit
This bit must be cleared to secure the content of the HSB. Only security level can
be increased.
6
BLJB
Boot loader Jump Bit
Set to force hardware boot address at 0000h. (unless previously force by hardware
conditions as described in the chapter 9.6).
Clear to force hardware boot address at FC03h (default).
5
BLLB
Boot loader Lock Bit
Set to allow programming and writing of the boot loader segment.
Clear to forbid software programming and writing of the boot loader segment
(default). This protection protect only ISP or IAP access; protection through parallel
access is done globally by the lock bits LB2-0.
4
-
Reserved
Do not clear this bit.
3
-
Reserved
Do not clear this bit.
2-0
LB2-0
User Memory Lock Bits
See Table 29
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