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參數(shù)資料
| 型號： | TA1218F |
| 廠商： | Toshiba Corporation |
| 英文描述： | TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic |
| 中文描述： | 東芝雙極線性集成電路硅單片 |
| 文件頁數(shù)： | 31/40頁 |
| 文件大?。?/td> | 637K |
| 代理商： | TA1218F |
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TA1218N/F
2000-09-11 31/40
Characteristics
Select Mode
Symbol
Test
Circuit
Min.
Typ.
Max.
Unit
Test Method
V
in
TV
F7C
10
MHz
V
in
V1
F10C
10
MHz
V
in
V2
F28C
10
MHz
Y/V
in
S1
F12C
10
MHz
C
in
S1
F14C
10
MHz
Y/V
in
S2
F16C
10
MHz
C
in
S2
F18C
10
MHz
C
out
Frequency response
C
in
F32C
10
MHz
(1) Apply a 1.0 V
p-p
sine wave to each
input pin.
(2) In each select
mode, measure a
frequency at which
the output
amplitude on pin
34 is 3dB down
from the 15 kHz
applied level.
(1) Apply a 3.58 MHz,
1.0 V
p-p
sine wave
to each input pin.
(2) In each select
mode, compare
signal output from
the selected pin
with leakage
components from
nonselected pins
to find a crosstalk.
V
in
TV
CT7C
55
60
dB
V
in
V1
CT10C
55
60
dB
V
in
V2
CT28C
55
60
dB
Y/V
in
S1
CT12C
55
60
dB
C
in
S1
CT14C
55
60
dB
Y/V
in
S2
CT16C
55
60
dB
C
in
S2
CT18C
55
60
dB
C
out
Crosstalk
C
in
CT32C
55
60
dB
V
in
TV
VDR7D
5.0
5.5
V
V
in
V1
VDR10D
5.0
5.5
V
V
in
V2
VDR28D
5.0
5.5
V
Y/V
in
S1
VDR12D
5.0
5.5
V
V
out1
V
out2
Y
out
VDR38D
1.5
2.0
V
VDR42D
1.5
2.0
V
VDR36D
1.2
1.8
V
Det select
Input dynamic range
C
out
V
in
TV
VDR34D
1.2
1.8
V
(1) Apply a 15 kHz
sine wave to each
input pin.
(2) In each select
mode, measure an
input amplitude at
which the output
waveform on pin 4
(46) begins to be
distorted.
G7D
0.5
0
0.5
dB
V
in
V1
G10D
0.5
0
0.5
dB
V
in
V2
G28D
0.5
0
0.5
dB
Y/V
in
S1
G12D
0.5
0
0.5
dB
V
out1
V
out2
Y
out
G38D
0.1
0
0.1
dB
G42D
0.1
0
0.1
dB
G36D
0.1
0
0.1
dB
Det select
Gain
C
out
G34D
0.1
0
0.1
dB
(1) Apply a 15 kHz,
1.0 V
p-p
sine wave
to each input pin.
(2) In each select
mode, find the gain
between input and
output.
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