- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98158 > TAS3004PFBR (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQFP48 PDF資料下載
參數(shù)資料
| 型號(hào)： | TAS3004PFBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁(yè)數(shù)： | 7/84頁(yè) |
| 文件大?。?/td> | 671K |
| 代理商： | TAS3004PFBR |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)當(dāng)前第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)
2–2
2.2
ADC Digital Output Modes
ADC digital output mode (SDOUT0) has two operational modes, normal and monaural. In the normal mode, the
output of the ADC conforms to the output modes described in Sections 2.2.1 through 2.2.3. To enter the normal output
mode, bit 7 (ADM) in the analog control register must be cleared to 0. In the monaural output mode, the digital output
of the ADC conforms to the output modes described in Sections 2.3.1 through 2.3.6. To enter the monaural mode,
bit 7 (ADM) in the analog control register must be set to 1.
2.2.1
MSB First, Right-Justified Serial Interface Format—Normal Mode
The normal output mode for the MSB first, right-justified serial interface format is for 16, 18, 20, and 24 bits with bit 7
(ADM) in the analog control register cleared to 0. Figure 2–1 shows the following characteristics of this protocol:
Left channel is transmitted when LRCLK is high.
The SDIN(s) (recorded) data is justified to the trailing edge of the LRCLK.
The SDOUT(s) MSB (playback) data is transmitted at the same time as LRCLK edge and captured at the
next rising edge of SCLK.
If LRCLK phase changes by more than 10MCLK, the codec automatically resets.
SCLK
LRCLK = fS
MSB
LSB
……
…… MSB
LSB
……
SDIN
MSB
LSB
……
…… MSB
LSB
……
Left Channel
Right Channel
SDOUT
……
Figure 2–1. MSB First, Right-Justified Serial Interface Format—Normal Mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TAS3004PFBG4 | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| TAS3004PFBRG4 | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| TAS3103DBT | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103IDBT | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103DBTRG4 | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS3004PFBRG4 | 功能描述:音頻 DSP Digital Audio Processor w/ Codec RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Audio Processor With 3D Effects |
| TAS3103A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Audio Processor With 3D Effects |
| TAS3103ADBT | 功能描述:音頻 DSP Digital Audio Processor w/ 3D Eff RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103ADBTG4 | 功能描述:音頻 DSP Digital Audio Processor w/ 3D Eff RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。