參數(shù)資料
型號(hào): TAS3103IDBT
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO38
封裝: GREEN, PLASTIC, TSSOP-38
文件頁數(shù): 27/148頁
文件大?。?/td> 1247K
代理商: TAS3103IDBT
47
4.4.5
I2C Slave Mode Interface Signals Over Recommended Operating Conditions (unless
otherwise noted)
PARAMETER
TEST
STANDARD MODE
FAST MODE
UNITS
PARAMETER
TEST
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
fSCL
Frequency, SCL
0
100
0
400
kHz
tW(H)
Minimum pulse duration,
SCL high
See Note 15
0.43
0.12
s
tW(L)
Minimum pulse duration,
SCL low
See Note 15
1.3
0.9
s
tr
Rise time, SDAOutput
CL = 330 pF
48.3
ns
tf
Fall time, SDAOutput
CL = 330 pF
35.9
ns
tsu1
Setup time, SDAInput to SCL See Note 15
0
ns
th1
Hold
SCL to SDAInput
See Note 15
0
ns
th1
Hold
time
SCL to SDAOutput
See Note 16
Toversamp
2Toversamp
Toversamp
2Toversamp
s
tbuf
Minimum bus free time
between STOP and START
condition
See Note 15
0.82
0.38
s
tsu2
Minimum setup time, SCL to
START condition
See Note 15
0.7
0.4
s
th2
Minimum hold time, START
condition to SCL
See Note 15
1.5
0.05
s
tsu3
Minimum setup time, SCL to
STOP condition
See Note 15
0.9
0.4
s
NOTES: 15. The maximum and/or minimum values for the TAS3103 I2C port parameters meets those characteristics of the SDA and SCL bus
lines listed below, as specified in the I2C bus devices bus specification.
16. Toversamp is the period of the oversample clock provided to the I2C master salve controller. This clock is dependent on the
microprocessor clock setting and the value set for the variable N in subaddress 0xFB. See Figure 214.
SPECIFIED I2C BUS CHARACTERISTICS
PARAMETER
STANDARD MODE
FAST MODE
Pulse duration high, tw(H)
4
s MIN
0.6
s MIN
SCL
Pulse duration low, tw(L)
4.7
s MIN
1.3
s MIN
SCL
Frequency fSCL
100 kHz
400 kHz
SDAInput
Setup time tsu1, SDAInput to SCL
250 ns MIN
100 ns MIN
SDAInput
Hold Time th1, SCL to SDAInput
0 ns MIN
Bus free time between STOP and START condition tbuf
4.7
s MIN
1.3
s MIN
START/STOP conditions
Setup time tsu2, SCL to START condition
4.7
s MIN
0.6
s MIN
START/STOP conditions
Hold time th2, START condition to SCL
4
s MIN
0.6
s MIN
Setup time tsu3, SCL to STOP condition
4
s MIN
0.6
s MIN
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