參數(shù)資料
型號: TAS3103IDBTRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO38
封裝: GREEN, PLASTIC, TSSOP-38
文件頁數(shù): 23/148頁
文件大?。?/td> 1247K
代理商: TAS3103IDBTRG4
44
4.4.2
Control Signals Over Recommended Operating Conditions (Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
tw1(L)
Pulse duration, RST low
10
ns
tpd1
Propagation delay, PWRDN high to power down state asserted
See Note 11
s
tpd2
Propagation delay, PWRDN low to power down state deasserted
See Note 12
s
NOTES: 11. The maximum worst case value for tpd1 is given by
t
pd1_worst_case +
4096
) GPIOFSCOUNT
LRCLK
)
80
Microprocessor_Clock
12. tpd2 is determined by the time it takes the internal digital PLL to reach a locked condition, which, in turn, is governed by the MCLKI/
XTALI frequency and the PLL output frequency. For a 135-MHz PLL output and an MCLKI value of 24.576 MHz, tpd2 is typically 25 s.
For an 11.264-MHz PLL output clock and a 1.024-MHz MCLKI/XTALI master clock, tpd2 is typically 360 s.
PWRDN
tw1(L)
tpd1
tpd2
RST
Figure 42. Control Signals Timing Waveforms
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