參數(shù)資料
型號: TAS5508PAGG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 98/105頁
文件大?。?/td> 1286K
代理商: TAS5508PAGG4
7.29 Volume, Treble, and Bass Slew Rates Register (0xD0)
7.30 Volume Registers (0xD1–0xD9)
TAS5508
8-Channel Digital Audio PWM Processor
SLES091D – FEBRUARY 2004 – REVISED JULY 2009
www.ti.com
Table 7-33. Volume Gain Update Rate (Slew Rate)
D31–D10
D9
D8
FUNCTION
0
512-step update at 4 Fs, 42.6 ms at 48 kHz
0
1
1024-step update at 4 Fs, 85.3 ms at 48 kHz
0
1
0
2048-step update at 4 Fs, 170 ms at 48 kHz
0
1
2048-step update at 4 Fs, 170 ms at 48 kHz
Table 7-34. Treble and Bass Gain Step Size (Slew Rate)
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
No operation
0
1
0
1
0
Minimum rate – Updates every 0.083 ms (every LRCLK at 48 kHz)
0
1
0
Updates every 0.67 ms (32 LRCLKs at 48 kHz)
0
1
Default rate - Updates every 1.31 ms (63 LRCLKs at 48 kHz). This is the
maximum constant time that can be set for all sample rates.
1
Maximum rate – Updates every 5.08 ms (every 255 LRCLKs at 48 kHz)
Channels 1, 2, 3, 4, 5, 6, 7, and 8 are mapped into registers 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7,
and 0xD8, respectively. The default volume for all channels is 0 dB.
Master volume is mapped into register 0xD9. The default for the master volume is mute.
Bits D31–D12 are Don't Care.
Table 7-35. Volume Register Format
D31
D30
D29
D28
D27
D26
D25
D24
FUNCTION
Unused bits
D23
D22
D21
D20
D19
D18
D17
D16
FUNCTION
Unused bits
D15
D14
D13
D12
D11
D10
D9
D8
FUNCTION
V11
V10
V9
V8
Volume
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
V7
V6
V5
V4
V3
V2
V1
V0
Volume
Serial-Control Interface Register Definitions
92
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