參數(shù)資料
型號(hào)： TAS5518CPAGR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁數(shù)： 55/103頁
文件大?。?/td> 2007K
代理商： TAS5518CPAGR
4.6.3
I
2C Serial Control Port Operation
TAS5518C
8-Channel Digital Audio PWM Processor
www.ti.com
SLES238A – SEPTEMBER 2008 – REVISED JULY 2009
Timing Characteristics for I
2C Interface Signals over recommended operating conditions (unless otherwise noted)
STANDARD MODE
FAST MODE
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
fSCL
SCL clock frequency
0
100
0
400
kHz
Hold time (repeated) START
tHD-STA
condition. After this period, the first
4
0.6
s
clock pulse is generated.
tLOW
LOW period of the SCL clock
4.7
1.3
s
tHIGH
HIGH period of the SCL clock
4
0.6
s
tSU-STA
Setup time for repeated START
4.7
0.6
s
tSU-DAT
Data setup time
250
100
s
tHD-DAT
Data hold time (1)(2)
0
3.45
0
0.9
s
20 + 0.1
tr
Rise time of both SDA and SCL
1000
500(4)
ns
Cb
(3)
20 + 0.1
tf
Fall time of both SDA and SCL
300
ns
Cb
(3)
tSU-STO
Setup time for STOP condition
4
0.6
s
Bus free time between a STOP and
tBUF
4.7
1.3
s
START condition
Cb
Capacitive loads for each bus line
400
pF
Noise margin at the LOW level for
VnL
each connected device (including
0.1
× V
DD
0.1
× V
DD
V
hysteresis)
Noise margin at the HIGH level for
VnH
each connected device (including
0.2
× V
DD
0.2
× V
DD
V
hysteresis)
(1)
Note that SDA does not have the standard I2C specification 300-ns hold time and that SDA must be valid by the rising and falling edges
of SCL. TI recommends that a 3.3-kW pullup resistor be used to avoid potential timing issues.
(2)
A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement tSU-DAT ≥250 ns must then be met.
This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line tr-max + tSU-DAT = 1000 + 250 = 1250 ns (according to the
standard-mode I2C bus specification) before the SCL line is released.
(3)
Cb = total capacitance of one bus line in pF.
(4)
Rise time varies with pullup resistor.
Figure 4-2. SCL and SDA Timing
Electrical Specifications
55
相關(guān)PDF資料
PDF描述
TAS5518CPAG SPECIALTY CONSUMER CIRCUIT, PQFP64
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TAS5518PAG 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
TAS5518PAG 制造商:Texas Instruments 功能描述:Pulse Width Modulation (PWM) Controller
TAS5518PAGG4 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
TAS5518PAGR 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
TAS5518PAGRG4 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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