參數(shù)資料
型號: TB32301
廠商: Toshiba Corporation
英文描述: TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
中文描述: 東芝的Bi - CMOS硅單片集成電路
文件頁數(shù): 8/17頁
文件大小: 1038K
代理商: TB32301
TB32301AFL
2.3
PLL reference counter setting
The PLL reference counter generates phase comparison frequency0.
It consists of 9-bit reference counter. The divide factor can be set in the range 4 to 511 by sending
any data to the reference counter.
MSB
1
0
1
0
0
0
0
0
1
R8
R7
R6
R5
R4
R3 R2
R1
R0
0
0
0
0
0
0
0
Group code
Auto-tuning counter: F
R
=
R0
+
R1
×
2
1
+
R2
×
2
2
+
---------
+
R8
×
2
8
(Divide factor)
=
R
4
<
(Divide factor)
<
511
2.4
Auto-tuning reference counter setting
The TB32301AFL has an automatic tuning system to correct the fluctuation of center frequency in
FM detector, which is caused by, for example, temperature change. To generate a reference clock to
correct the fluctuation, set the divide factor of auto-tuning reference counter to the value to obtain
200-kHz frequency, according to external reference clock frequency.
The auto-tuning reference counter consists of 8 bits.
The divide factor can be set in the range 6 to 255 by sending any data to the reference counter.
F
=
F0
+
F1
×
2
1
+
F2
×
2
2
+
---------
+
F7
×
2
7
(Divide factor)
=
F
6
<
(Divide factor)
<
255
MSB
1
0
1
0
0
0
0
1
0
F7
F6
F5
F4
F3
F2
F1
F0
0
0
0
0
0
0
0
0
Group code
Auto-tuning counter: F
Internal control bits
(always 0) (Note)
Note Internal control bits are used to control the PLL. Please clear the bits. Otherwise, the PLL may not operate
properly.
Dec./5
th
/2002
8
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