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參數(shù)資料
| 型號： | TC500COE |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-013, SOIC-16 |
| 文件頁數(shù)： | 5/38頁 |
| 文件大小： | 562K |
| 代理商： | TC500COE |
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2008 Microchip Technology Inc.
DS21428E-page 13
TC500/A/510/514
6.0
ANALOG SECTION
6.1
Differential Inputs (VIN+, VIN–)
The TC5XX operates with differential voltages within
the input amplifier Common mode range. The amplifier
Common mode range extends from 1.5V below
positive supply to 1.5V above negative supply. Within
this Common mode voltage range, Common mode
rejection is typically 80 dB. Full accuracy is maintained,
however, when the inputs are no less than 1.5V from
either supply.
The integrator output also follows the Common mode
voltage. The integrator output must not be allowed to
saturate. A worst-case condition exists, for example,
when a large, positive Common mode voltage, with a
near full-scale negative differential input voltage, is
applied. The negative input signal drives the integrator
positive when most of its swing has been used up by
the positive Common mode voltage. For these critical
applications, the integrator swing can be reduced. The
integrator output can swing within 0.9V of either supply
without loss of linearity.
6.2
Analog Common
Analog common is used as VIN return during system
zero and reference de-integrate. If VIN– is different from
analog common, a Common mode voltage exists in the
system. This signal is rejected by the excellent CMR of
the converter. In most applications, VIN– will be set at a
fixed known voltage (i.e., power supply common). A
Common mode voltage will exist when VIN– is not
connected to analog common.
6.3
Differential Reference
(VREF+, VREF–)
The reference voltage can be anywhere within 1V of
the power supply voltage of the converter. Rollover
error is caused by the reference capacitor losing or
gaining charge due to stray capacitance on its nodes.
The difference in reference for (+) or (-) input voltages
will cause a rollover error. This error can be minimized
by using a large reference capacitor in comparison to
the stray capacitance.
6.4
Phase Control Inputs (A, B)
The A, B unlatched logic inputs select the TC5XX
operating phase. The A, B inputs are normally driven
by a microprocessor I/O port or external logic.
6.5
Comparator Output
By monitoring the comparator output during the fixed
signal integrate time, the input signal polarity can be
determined by the microprocessor controlling the
conversion. The comparator output is high for positive
signals and low for negative signals during the signal
integrate phase (see Figure 6-1).
During
the
reference
de-integrate
phase,
the
comparator output will make a high-to-low transition as
the integrator output ramp crosses zero. The transition
is used to signal the processor that the conversion is
complete.
The internal comparator delay is 2 μs, typically.
Figure 6-1 shows the comparator output for large
positive and negative signal inputs. For signal inputs at
or near zero volts, however, the integrator swing is very
small. If Common mode noise is present, the
comparator can switch several times during the
beginning of the signal integrate period. To ensure that
the polarity reading is correct, the comparator output
should be read and stored at the end of the signal
integrate phase.
The comparator output is undefined during the auto-
zero phase and is used to time the integrator output
zero phase. (See Section 8.6 “Integrator Output Zero
FIGURE 6-1:
Comparator Output.
Integrator
Output
Zero
Crossing
Comparator
Output
Reference
Signal
Integrate
Integrator
Output
Zero
Crossing
Comparator
Output
Reference
Deintegrate
Signal
Integrate
B. Negative Input Signal
A. Positive Input Signal
De-integrate
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