參數(shù)資料
型號: TC665EUN
元件分類: 運(yùn)動控制電子
英文描述: BRUSHLESS DC MOTOR CONTROLLER, PDSO10
封裝: PLASTIC, MSOP-10
文件頁數(shù): 11/36頁
文件大?。?/td> 695K
代理商: TC665EUN
2002 Microchip Technology Inc.
DS21737A-page 19
TC664/TC665
6.3
CONFIGURATION REGISTER
(CONFIG)
The Configuration Register is an 8-bit, read/writable,
multi-function control register. This register allows the
user to clear fan faults, select RPM resolution, select
VOUT duty cycle (fan speed) control method, select the
fan current pulses per rotation for the fan (for fan RPM
calculation) and put the TC664/TC665 device into a
shutdown mode to reduce power consumption. See
Register 6-3 below for the Configuration Register bit
descriptions.
REGISTER 6-3:
CONFIGURATION REGISTER (CONFIG)
R/W-0
U-0
U-1
R/W-0
R/W-1
R/W-0
FFCLR
RES
DUTYC
FPPR
SDM
bit 7
bit 0
bit 7
FFCLR: Fan Fault Clear
1
= Clear Fan Fault, this will reset the Fan Fault bit in the Status Register and the FAULT out-
put.
0
= Normal Operation (default)
bit 6
RES: Resolution Selection for RPM Output Register
1
= RPM Output Register (RPM) will be set for 25 RPM (9-bit) resolution.
0
= RPM Output Register (RPM) will be set for 50 RPM (8-bit) resolution. (default)
bit 5
DUTYC: Duty-Cycle Control Method
1
= The VOUT duty-cycle will be controlled via the SMBus interface. The value for the VOUT
duty-cycle will be taken from the duty-cycle register (DUTY_CYCLE).
0
= The VOUT duty-cycle will be controlled via the VIN analog input pin. The VOUT duty-cycle
value will be between 30% and 100% for VIN values between 1.62 V and 2.6 V typical. If
the VIN pin is open when this mode is selected, the VOUT duty-cycle will default to 39.33%.
(default)
bit 4
Unimplemented: Read as '0'
bit 3
Unimplemented: Read as '1'
bit 2-1
FPPR: Fan Pulses Per Rotation
The TC664/TC665 device uses this setting to understand how many current pulses per revolu-
tion the fan should have. It then uses this as part of the calculation for the fan RPM value for
the RPM Register. See Section 7.7 for application information on determining your fan’s
number of current pulses per revolution.
00
=1
01
= 2 (default)
10
=4
11
=8
bit 0
SDM: Shutdown Mode
1
= Shutdown Mode. See Section 4.9 for more information on low power shutdown mode.
0
= Normal Operation. (default)
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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