參數(shù)資料
型號(hào)： TDA1306T-T
廠商： NXP SEMICONDUCTORS
元件分類： DAC
英文描述： DUAL, SERIAL INPUT LOADING, 20-BIT DAC, PDSO24
文件頁數(shù)： 6/24頁
文件大?。?/td> 166K
代理商： TDA1306T-T
1998 Jan 06
14
Philips Semiconductors
Product specication
Noise shaping lter DAC
TDA1306T
AC CHARACTERISTICS (ANALOG)
VDDD =VDDA =VDDO = 5 V; Tamb =25 °C; all voltages referenced to ground (pins 2, 9 and 23); unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DACs
SVRR
supply voltage ripple
rejection VDDA and VDDO
fripple = 1 kHz;
Vripple = 100 mV (p-p);
C22 = 10
F
40
dB
G
v
unbalance between the
2 DAC voltage outputs
(pins 18 and 21)
maximum volume
0.5
dB
αct
crosstalk between the 2 DAC
voltage outputs
(pins 18 and 21)
one output digital silence
the other maximum volume
110
85
dB
(THD + N)/S
total harmonic distortion
plus noise-to-signal ratio
at 0 dB signal level;
fi = 1 kHz
70
dB
0.032
%
at
60 dB signal level;
fi = 1 kHz
42
32
dB
0.8
2.5
%
S/N
signal-to-noise ratio
no signal; A-weighted
108
96
dB
Operational ampliers
Gv
open-loop voltage gain
85
dB
PSRR
power supply rejection ratio
fripple = 3 kHz;
Vripple = 100 mV (p-p);
A-weighted
90
dB
(THD + N)/S
total harmonic distortion
plus noise-to-signal ratio
RL >5k;fi = 1 kHz;
Vo = 2.8 V (p-p)
100
dB
fUG
unity gain frequency
open loop
4.5
MHz
|Zo|
AC output impedance
RL >5k
1.5
150
相關(guān)PDF資料
PDF描述
TDA1306TD SERIAL INPUT LOADING, 20-BIT DAC, PDSO24
TDA1306TD-T SERIAL INPUT LOADING, 20-BIT DAC, PDSO24
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