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參數(shù)資料
| 型號： | TDA1388 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Bitstream continuous calibration filter-DAC for CD-ROM audio applications |
| 中文描述： | 流連續(xù)的校準(zhǔn)器，數(shù)模轉(zhuǎn)換器的CD - ROM音頻應(yīng)用 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 138K |
| 代理商： | TDA1388 |
1996 Jul 17
6
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
FUNCTIONAL DESCRIPTION
The TDA1388 CMOS DAC incorporates an up-sampling
digital filter, a sample-and-hold register, a noise shaper,
continuously calibrated current sources, line amplifiers
and headphone amplifiers. The 1f
s
input data is increased
to an oversampled rate of 64f
s
. This high-rate
oversampling, together with the 5-bit DAC, enables the
filtering required for waveform smoothing and out-of-band
noise reduction to be achieved by simple 1st-order analog
post-filtering.
System clock
The TDA1388 accommodates slave mode only, this
means that in all applications the system devices must
provide the system clock. The system frequency is
selectable. The options are 256f
s
and 384f
s
. The system
clock must be locked in frequency to the I
2
S-bus input
signals.
Table 1
System clock selection
Multiple format input interface
The TDA1388 supports the following data input formats;
I
2
S-bus with data word length of up to 20 bits.
LSB justified serial format with data word length of
16, 18 or 20 bits.
SYSSEL
DESCRIPTION
0
1
256f
s
384f
s
Table 2
Data input formats
The input formats are illustrated in Fig.3. Left and right
data-channel words are time multiplexed.
Input mode
The TDA1388 has two input modes, a static-pin mode and
a microcontroller mode. In the static-pin mode, the digital
sound processing features such as mute left, mute right
and de-emphasis are controlled by external pins.
The other digital sound processing features have a default
value. In the microcontroller mode, all the digital sound
processing features can be controlled by the
microcontroller. The controllable features are:
De-emphasis
Volume left channel
Volume right channel
Flat/min/max switch
Bass boost
Treble
Channel manipulation modes.
The selection of one of the two modes is controlled by the
ACP pin. When this pin is at logic 0 then the static pin
mode will be selected. When the pin is at logic 1 then the
microcontroller mode will be selected.
IF1
IF2
FORMAT
0
0
1
1
0
1
0
1
I
2
S-bus
LSB-justified, 16 bits
LSB-justified, 18 bits
LSB-justified, 20 bits
Table 3
Selectable values of the digital sound processing features
FEATURES
STATIC-PIN MODE
MICROCONTROLLER MODE
De-emphasis
Volume left channel
Volume right channel
Flat/min/max switch
Bass boost
Treble
Mute left channel
Mute right channel
Channel manipulation modes
0 Hz or 44.1 kHz
0 dB (fixed)
0 dB (fixed)
flat (fixed)
flat set (fixed)
flat set (fixed)
external pin
external pin
L_CHANNEL = L (fixed)
R_CHANNEL = R (fixed)
0 Hz or 44.1 kHz
0 dB to
∞
dB
0 dB to
∞
dB
flat/min/max
flat, min or max set
flat, min or max set
selectable (see Table 4)
selectable (see Table 4)
selectable (see Table 10)
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| TDA1388M | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bitstream continuous calibration filter-DAC for CD-ROM audio applications |
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