1997 Aug 14
5
Philips Semiconductors
Preliminary specification
Multiple voltage regulator with switch
TDA3608Q
PINNING
SYMBOL
PIN
DESCRIPTION
V
P
REG1
REG3
EN3
RES
EN1
ENSW
HOLD
C
RES
GND
REG2
BU
SW
1
2
3
4
5
6
7
8
9
supply voltage
regulator 1 output
regulator 3 output
enable input regulator 3
reset output
enable input regulator 1
enable input power switch
hold output
reset delay capacitor
ground
regulator 2 output
back-up
power switch output
10
11
12
13
Fig.2 Pin configuration.
handbook, halfpage
TDA3608Q
MGK601
1
2
3
4
5
6
7
8
9
10
11
12
13
VP
REG1
REG3
EN3
EN1
ENSW
HOLD
REG2
RES
SW
BU
CRES
GND
FUNCTIONAL DESCRIPTION
The TDA3608Q is a multiple output voltage regulator with
a power switch, intended for use in car radios with or
without a microcontroller. Because of low-voltage
operation of the car radio, low-voltage drop regulators are
used in the TDA3608Q.
Regulator 2 will switch on when the back-up voltage
exceeds 6.5 V for the first time and will switch off again
when the output voltage of regulator 2 drops below 1.9 V
(this is far below an engine start). When regulator 2 is
switched on and the output voltage of this regulator is
within its voltage range, the reset output will be enabled
(reset will go HIGH via a pull-up resistor) to generate a
reset to the microcontroller. The reset cycles can be
extended by an external capacitor at pin 9. The above
mentioned start-up feature is built-in to secure a smooth
start-up of the microcontroller at first connection, without
uncontrolled switching of regulator 2 during the start-up
sequence.
The charge of the back-up capacitor can be used to supply
regulator 2 for a short period when the supply falls down
to 0 V (time depends on value of storage capacitor).
When regulator 2 and the supply voltage (V
P
> 4.5 V) are
both available, regulators 1 and 3 can be operated by
means of enable inputs (pins 6 and 4 respectively).
Regulator 1 has a hold output (open collector) indicating
that the output voltage of this regulator is settled (held
HIGH by external pull-up resistor) and when the output
voltage of this regulator drops out of regulation (because
of supply voltage drop or high load) the hold output will go
LOW. The hold output signal is only valid when regulator 1
is enabled by its enable input (pin 6).
The power switch can also be controlled by means of a
separate enable input (pin 7) as shown in Fig.3 for the
behaviour of the power switch output.
All output pins are fully protected. The regulators are
protected against load dump (regulators 1 and 3 will
switch off at supply voltages >18 V) and short-circuit
(foldback current protection).
The power switch contains a current protection, but this
protection is delayed at short-circuit condition for at least
10 ms. During this time the output current is limited to a
peak value of at least 3 A and 2 A continuous (V
P
≤
18 V).
At supply voltages >17 V the power switch is clamped at
maximum 16 V (to avoid external connected circuitry being
damaged by an overvoltage) and the power switch will
switch off at load dump.
The total timing diagram is shown in Fig.3.