- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383989 > TDA4886A (NXP SEMICONDUCTORS) 140 MHz video controller with I2C-bus PDF資料下載
參數(shù)資料
| 型號： | TDA4886A |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | 140 MHz video controller with I2C-bus |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| 封裝： | 0.400 INCH, PLASTIC, SDIP-24 |
| 文件頁數(shù)： | 9/52頁 |
| 文件大?。?/td> | 495K |
| 代理商： | TDA4886A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
1998 Dec 04
9
Philips Semiconductors
Product specification
140 MHz video controller with I
2
C-bus
TDA4886A
7.9
I
2
C-bus control
The TDA4886A contains an I
2
C-bus receiver for several
control functions:
1.
Contrast control with 6-bit DAC
2.
Brightness control with 6-bit DAC
3.
OSD contrast control with 4-bit DAC
4.
Gain control for each channel with 6-bit DAC
5.
Internal feedback reference and external reference
voltage control for each channel with 8-bit DAC
6.
Control register with control bits BLH2, BLH1, FPOL,
DISV, DISO and PEDST.
After power-up and after internal power-on reset of the
I
2
C-bus the registers are set to the following values:
Control bit FPOL to logic 1
Control bits BLH2, BLH1, DISV, DISO and PEDST to
logic 0
All other alignment registers to logic 0 (minimum value
for control registers).
7.10
I
2
C-bus data buffer
1.
Buffered mode
Adjustments via the I
2
C-bus are synchronized with
vertical blanking pulse at CLI.
a) Most significant bit (MSB) of subaddresses is set to
logic 1.
b) Only one I
2
C-bus transmission in buffered mode is
accepted before the start of the vertical blanking
pulse. Following transmission trials will get no
acknowledge.
c) Received data is stored in one internal 8-bit buffer.
d) Adjustments will take effect with detection of the
first vertical blanking pulse after the end of
according I
2
C-bus transmission.
e) Waiting for vertical blanking pulse in buffered mode
can be interrupted by power-on reset.
f) Auto-increment is impossible.
g) Buffered mode should be used for user
adjustments such as contrast, OSD contrast and
brightness while picture on monitor is visible.
2.
Direct mode
Adjustments via the I
2
C-bus take effect immediately.
a) Most significant bit (MSB) of subaddresses is set to
logic 0.
b) Number of I
2
C-bus transmissions in direct mode is
unlimited.
c) Adjustments take effect directly at the end of each
I
2
C-bus transmission.
d) Direct mode can be used for all adjustments but
large changes of control values may appear as
visual disturbances in the picture on the monitor.
e) Auto-increment is possible.
f) Vertical blanking pulse is not necessary.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA4886 | 140 MHz video controller with I2C-bus |
| TDA4887 | 160 MHz bus-controlled monitor video preamplifier |
| TDA4887PS | 160 MHz bus-controlled monitor video preamplifier |
| TDA5140 | Transient Voltage Suppressor Diodes |
| TDA5144ATD | Transient Voltage Suppressor Diodes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA4887 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:160 MHz bus-controlled monitor video preamplifier |
| TDA4887PS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:160 MHz bus-controlled monitor video preamplifier |
| TDA4916GG | 功能描述:其他電源管理 SMPS IC with MOSFET Drvr Output RoHS:否 制造商:Texas Instruments 輸出電壓范圍: 輸出電流:4 mA 輸入電壓范圍:3 V to 3.6 V 輸入電流: 功率耗散: 工作溫度范圍:- 40 C to + 110 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-48 封裝:Reel |
| TDA4916GGHUMA1 | 制造商:Infineon Technologies AG 功能描述:Switch Mode Power Supply 24-Pin DSO 制造商:Infineon Technologies AG 功能描述:IC SMPS W/ MOSFET OUTPUT PDSO-24 |
| TDA4916GGNT | 制造商:Infineon Technologies AG 功能描述:Switch Mode Power Supply 24-Pin DSO |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。