參數(shù)資料
型號(hào): TDA7403D
廠商: 意法半導(dǎo)體
英文描述: BASIC SIGNAL PROCESSOR
中文描述: 基本信號(hào)處理器
文件頁數(shù): 7/26頁
文件大?。?/td> 195K
代理商: TDA7403D
Input stages
The input circuits are the same as in preceeding
ST audioprocessorswith exception of the CD in-
puts (see figure 1).
The typical input impedanceis 100k
.
AutoZero
In order to reduce the number of pins there is no
AC coupling between the In-Gain and the follow-
ing stage, so that any offset generated by or be-
fore the In-Gain stage would be transferred or
even amplifiedto the output.
To avoid that effect a special offset cancellation
stage called AutoZerois implemented.
To avoid audible clicks the audioprocessor is
muted before the loudness stageduring this time.
In some cases, for example if the
μ
P is executing
a refresh cycle of the I
2
C bus programming, it is
not usefulto start a new AutoZeroaction because
no newsource is selectedand an undesiredmute
would appear at the outputs. For such applica-
tions the TDA7403 could be switched in the ”Auto
Zero Remain” mode (Bit 6 of the subaddress
byte). If this bit is set to high, the DATABYTE 0
could be loaded without invoking the AutoZero
and the old adjustmentvalue remains.
MixingStage
This stage offers the possibilityto mix the internal
beep or the phone signal to any other source.
Due to the fact that the mixing stage is also lo-
cated behind the In-Gain stage fine adjustments
of the mainsource level can be done in thisway.
Loudness
There are four parameters programmable in the
loudness stage (seefig.2, 3, 4):
- Attenuation
- Center Frequency
- LoudnessQ
- FlatMode:in thismodethe loudnessstageworks
asa0 -15dBattenuator.
D98AU951
100K
100K
100K
STEREODECODER
IN GAIN
CASSETTE
AM
MPX
Figure 1. Inputstages
-20.0
-15.0
-10.0
-5.0
0.0
10.0
100.0
1.0K
10.0K
Figure 2. Loudness Attenuation @ fc = 400Hz
(second order)
-20.0
-15.0
-10.0
-5.0
0.0
10.0
100.0
1.0K
10.0K
Figure 3. Loudness Center frequency @ Attn.
= 15dB(second order)
DESCRIPTION OF THE AUDIOPROCESSOR
TDA7403
7/26
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