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參數資料
| 型號： | TDA9851T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | I2C-bus controlled economic BTSC stereo decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| 封裝： | 7.5 MM, PLASTIC, SO-24 |
| 文件頁數： | 10/20頁 |
| 文件大?。?/td> | 145K |
| 代理商： | TDA9851T |
1997 Nov 12
10
Philips Semiconductors
Product specification
I
2
C-bus controlled economic BTSC stereo
decoder
TDA9851
I
2
C-BUS PROTOCOL
I
2
C-bus format to read (slave transmits data)
Table 1
Explanation of I
2
C-bus format to read (slave transmits data)
Table 2
Definition of the transmitted bytes after read condition
Table 3
Function of the bits in Table 2
I
2
C-bus format to write (slave receives data)
Table 4
Explanation of I
2
C-bus format to write (slave receives data)
Table 5
Definition of the DATA (second byte after MAD)
S
SLAVE ADDRESS
R/W
A
DATA
P
NAME
DESCRIPTION
S
Standard SLAVE ADDRESS (MAD)
R/W
A
DATA
P
START condition; generated by the master
101 101 1
logic 1 (read); generated by the master
acknowledge; generated by the slave
slave transmits an 8-bit data word
STOP condition; generated by the master
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
Y
Y
Y
Y
Y
Y
Y
STP
BITS
FUNCTION
STP
Y
stereo pilot identification (stereo received = 1)
indefinite
S
SLAVE ADDRESS
R/W
A
DATA
A
P
NAME
DESCRIPTION
S
Standard SLAVE ADDRESS (MAD)
R/W
A
DATA
P
START condition
101 101 1
logic 0 (write)
acknowledge; generated by the slave
see Table 5
STOP condition
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
0
0
AT2
AT1
CCD
AVLON
GMU
STEREO
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