參數(shù)資料
型號(hào)： TDA9870A
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Digital TV Sound Processor DTVSP
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP64
封裝： SHRINK, PLASTIC, DIP
文件頁(yè)數(shù)： 33/88頁(yè)
文件大小： 362K
代理商： TDA9870A
1998 Aug 10
33
Philips Semiconductors
Product specification
Digital TV Sound Processor (DTVSP)
TDA9870A
10.3.2
G
ENERAL CONFIGURATION REGISTER
10.3.2.1
Description
Table 15
Description of Table 16
10.3.2.2
Definition
Table 16
Subaddress 1 (note 1)
Note
1.
The default setting at power-up is 11000000.
NAME
SIFSEL
HIGH/LOW
HIGH
LOW
HIGH
LOW
FUNCTION
Selects pin SIF2 for input (recommended for satellite tuner).
Pin SIF1 (terrestrial TV) is selected.
Forces the AGC block to a fixed gain as defined in the AGC gain register.
The automatic gain control function is enabled and the contents of the AGC gain register is
ignored.
A longer decay time is selected for input signals with strong video modulation (intercarrier).
This bit only has an effect when bit AGCOFF = 0.
Selects normal attack and decay times for the AGC.
Resets the power fail detector to LOW.
This bit is automatically reset to LOW after bit POR in the device status register has been
reset.
Causes initialization of TDA9870A to its default settings. This has the same effect as a
power-on reset. If there is a conflict between the default settings and any bit set HIGH in
this register, the bits of this register have priority over the corresponding default setting.
This bit is automatically reset to LOW after initialization. When set LOW, the TDA9870A is
in its normal mode of operation.
Puts the TDA9870A into the standby mode. Most functions are disabled and power
dissipation is somewhat reduced, but the analog selectors/matrices remain operational to
support analog copying from SCART-to-SCART and vice versa.
The TDA9870A is in its normal mode of operation. On return from standby mode, the
device is in its power-on reset mode and needs to be re-initialized.
These bits control the general purpose input/output pins. The contents of these bits is
written directly to the corresponding pins. If input is desired, the bits must be set HIGH to
allow the pins to be pulled LOW externally. Input from the pins is reflected in the device
status register (see Section 10.4, subaddress 0). P1OUT is recommended to be used for
switching an SIF trap for the adjacent picture carrier in designs that employ such a trap.
AGCOFF
AGCSLOW
HIGH
LOW
HIGH
LOW
CLRPOR
INIT
HIGH
LOW
STDBY
HIGH
LOW
P1OUT,
P2OUT
BIT
NAME
DESCRIPTION
7 (MSB)
6
5
4
3
2
1
0 (LSB)
P2OUT
P1OUT
STDBY
INIT
CLRPOR
AGCSLOW
AGCOFF
SIFSEL
general purpose I/O pin 2
general purpose I/O pin 1
standby mode on/off
initialize to defaults (as reset)
clear power-on reset flip-flop
AGC decay time
AGC on/off
SIF input select
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