參數(shù)資料
型號： TDA9964
廠商： NXP Semiconductors N.V.
英文描述： 12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
中文描述： 12位，為3.0 V，30 Msps的模擬到數(shù)字的CCD相機接口
文件頁數(shù)： 2/24頁
文件大?。?/td> 109K
代理商： TDA9964
2000 May 02
2
Philips Semiconductors
Objective specification
12-bit, 3.0 V, 30 Msps analog-to-digital
interface for CCD cameras
TDA9964
FEATURES
Correlated Double Sampling (CDS), Programmable
Gain Amplifier (PGA), 12-bit Analog-to-Digital
Converter (ADC) and reference regulator included
Fully programmable via a 3-wire serial interface
Sampling frequency up to 30 MHz
PGA gain range of 24 dB (in steps of 0.1 dB)
Low power consumption of only 205 mW at 2.7 V
Power consumption in standby mode of 4.5 mW (typ.)
3.0 V operation and 2.5 to 3.6 V operation for the digital
outputs
All digital inputs accept 5 V signals
Active control pulses polarity selectable via serial
interface
8-bit DAC included for analog settings
TTL compatible inputs, CMOS compatible outputs.
APPLICATIONS
Low-power, low-voltage CCD camera systems.
GENERAL DESCRIPTION
The TDA9964 is a 12-bit analog-to-digital interface for
CCD cameras. The device includes a correlated double
sampling circuit, PGA, clamp loops and a low-power 12-bit
ADC together with its reference voltage regulator.
The PGA gain and the ADC input clamp level are
controlled via the serial interface.
An additional DAC is provided for additional system
controls; its output voltage range is 1.0 V p-p, which is
available at pin OFDOUT.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
analog supply voltage
digital supply voltage
digital outputs supply voltage
analog supply current
digital supply current
digital outputs supply current
2.7
2.7
2.5
3.0
3.0
2.7
71
4
1
3.6
3.6
3.6
V
V
V
mA
mA
mA
all clamps active
f
pix
= 30 MHz; C
L
= 10 pF; input
ramp response time is 800
μ
s
ADC
res
V
i(CDS)(p-p)
maximum CDS input voltage (peak-to-peak
value)
ADC resolution
650
800
30
tbf
12
24
1.5
70
230
205
bits
mV
mV
MHz
MHz
dB
LSB
μ
V
mW
mW
V
CC
= 2.85 V
V
CC
≥
3.0 V
f
pix(max)
f
pix(min)
DR
PGA
N
tot(rms)
E
in(rms)
P
tot
maximum pixel frequency
minimum pixel frequency
PGA dynamic range
total noise from CDS input to ADC output
equivalent input noise (RMS value)
total power consumption
PGA gain = 0 dB; see Fig.8
gain = 24 dB
V
CCA
= V
CCD
= V
CCO
= 3 V
V
CCA
= V
CCD
= V
CCO
= 2.7 V
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA9964HL
LQFP48
plastic low profile quad flat package; 48 leads; body 7
×
7
×
1.4 mm
SOT313-2
相關(guān)PDF資料
PDF描述
TDA9964HL 12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
TDA9965A 12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras
TDA9965AHL 12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TDA9964HL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
TDA9965 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit, 5.0 V, 30 Msps analog-to-digital interface for CCD cameras
TDA9965A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras
TDA9965AHL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras
TDA9965AHL/C3,118 功能描述:CCD CAMERA INTERFACE 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤
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