參數(shù)資料
型號: TH50VSF2580AASB
廠商: Toshiba Corporation
英文描述: GT 5C 5#16 PIN RECP WALL RM
中文描述: SRAM和閃存混合多芯片封裝
文件頁數(shù): 27/50頁
文件大?。?/td> 546K
代理商: TH50VSF2580AASB
TH50VSF2580/2581AASB
2001-10-26 27/50
COMMON FLASH MEMORY INTERFACE (CFI)
The TH50VSF2520/2581AASB conforms to the CFI specifications. To read information from the device, input
the Query command followed by the address. In Word Mode DQ8~DQ15 all output 0s. To exit this mode, input
the Reset command.
CFI CODE TABLE
ADDRESS A6~A0
DATA DQ15~DQ0
DESCRIPTION
10H
11H
12H
0051H
0052H
0059H
ASCII string
QRY
13H
14H
0002H
0000H
Primary OEM command set
2: AMD/FJ standard type
15H
16H
0040H
0000H
Address for primary extended table
17H
18H
0000H
0000H
Alternate OEM command set
0: none exists
19H
1AH
0000H
0000H
Address for alternate OEM extended table
1BH
0027H
V
DD
(min) (Write/Erase)
DQ7~DQ4: 1 V
DQ3~DQ0: 100 mV
1CH
0036H
V
DD
(max) (Write/Erase)
DQ7~DQ4: 1 V
DQ3~DQ0: 100 mV
1DH
0000H
V
PP
(min) voltage
1EH
0000H
V
PP
(max) voltage
Typical time-out per single byte/word write (2
N
μ
s)
Typical time-out for minimum size buffer write (2
N
μ
s)
Typical time-out per individual block erase (2
N
ms)
1FH
0004H
20H
0000H
21H
000AH
22H
0000H
Typical time-out for full chip erase (2
N
ms)
23H
0005H
Maximum time-out for byte/word write (2
N
times typical)
24H
0000H
Maximum time-out for buffer write (2
N
times typical)
25H
0004H
Maximum time-out per individual block erase (2
N
times typical)
26H
0000H
Maximum time-out for full chip erase (2
N
times typical)
27H
0016H
Device Size (2
N
byte)
28H
29H
0002H
0000H
Flash device interface description
2:
×
8/
×
16
2AH
2BH
0000H
0000H
Maximum number of bytes in multi-byte write (2
N
)
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