參數(shù)資料
型號: THS1041IPWRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: GREEN, PLASTIC, TSSOP-28
文件頁數(shù): 8/41頁
文件大?。?/td> 810K
代理商: THS1041IPWRG4
THS1041
SLAS289C OCTOBER 2001 REVISED OCTOBER 2004
16
www.ti.com
PRINCIPLES OF OPERATION
sample-and-hold
Differential input signal sources can be connected directly to the AIN+ and AIN pins using either dc- or
ac-coupling.
For single-ended sources, the signal can be dc- or ac-coupled to one of AIN+ or AIN, and a suitable reference
voltage (usually the midscale voltage, see operating configuration examples) must be applied to the other pin.
Note that connecting the signal to AIN results in it being inverted during sampling.
The sample and hold differential output voltage VP = VP+ VP is given by
VP = (AIN+) (AIN)
A clamp is available for dc restoration of ac-coupled single-ended inputs (see clamp operation).
programmable gain amplifier
VP is amplified by the PGA and fed to the ADC as a voltage VQ = VQ+ VQ where
VQ = Gain
× VP = Gain × [(AIN+) (AIN)]
analog-to-digital converter
VQ is digitized by the ADC, using the voltages at pins REFT and REFB to set the ADC zero-scale (code 0) and
full-scale (code 1023) input voltages.
VQ (ZS) = (REFT REFB)
VQ (FS) = (REFT REFB)
Any inputs at AIN+ and AIN that give VQ voltages less than VQ(ZS) or greater than VQ(FS) lie outside the
ADC’s conversion range and attempts to convert such voltages are signalled by driving pin OVR high when the
conversion result is output. VQ voltages less than VQ(ZS) digitize to give ADC output code 0, and VQ voltages
greater than VQ(FS) give ADC output code 1023.
complete system and system input range
Combining the above equations to find the input voltages [(AIN+) (AIN)] that correspond to the limits of the
ADC’s valid input range gives:
(REFB
* REFT)
Gain
v [(AIN)) * (AIN*)] v
(REFT
* REFB)
Gain
For both single-ended and differential inputs, the ADC can thus handle signals with a peak-to-peak input range
[(AIN+) (AIN)] of:
pkpk input range
+ 2
(REFT
* REFB)
Gain
[(AIN+) (AIN)]
The next sections describe the options available to the user for setting the REFT and REFB voltages to obtain
the desired input range and performance in their THS1041 applications.
(1)
(2)
(3)
(4)
(5)
(6)
相關(guān)PDF資料
PDF描述
THS1041CDWG4 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1041IDW 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1041IDWG4 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1041IPWR 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1041IPWG4 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
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