參數(shù)資料
型號(hào): THS1206MDAREP
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
封裝: GREEN, PLASTIC, TSSOP-32
文件頁(yè)數(shù): 3/43頁(yè)
文件大小: 799K
代理商: THS1206MDAREP
THS1206EP
12BIT 6 MSPS, SIMULTANEOUS SAMPLING
ANALOGTODIGITAL CONVERTERS
SGLS126A JULY 2002 REVISED FEBRUARY 2003
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
continuous conversion mode (continued)
Figure 4 shows the timing of continuous conversion mode when three analog input channels are selected. The
maximum throughput rate per channel is 2 MSPS in this mode. The data flow in the bottom of the figure shows
in which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for
a trigger level set to 3.
AIN
CONV_CLK
Data Into
FIFO
DATA_AV,
Trigger Level = 3
td(DATA_AV)
Sample N
Channel 1,2,3
Sample N+1
Channel 1,2,3
Sample N+2
Channel 1,2,3
td(O)
Data N2
Channel 2
Data N2
Channel 3
Data N1
Channel 2
Data N1
Channel 2
Data N1
Channel 3
Data N
Channel 1
Data N
Channel 2
Data N+1
Channel 3
tc
td(A)
tw(CONV_CLKH)
tw(CONV_CLKL)
td(Pipe)
50%
Figure 4. Timing of Continuous Conversion Mode (3-channel operation)
Figure 5 shows the timing of continuous conversion mode when four analog input channels are selected. The
maximum throughput rate per channel is 1.5 MSPS in this mode. The data flow in the bottom of the figure shows
in which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for
a trigger level of 4.
AIN
CONV_CLK
Data Into
FIFO
DATA_AV,
Trigger Level = 4
tw(CONV_CLKH)
Sample N
Channel 1,2,3,4
Sample N+1
Channel 1,2,3,4
Sample N+2
Channel 1,2,3,4
td(Pipe)
tw(CONV_CLKL)
tc
td(O)
Data N2
Channel 4
Data N1
Channel 1
Data N1
Channel 2
Data N1
Channel 3
Data N1
Channel 4
Data N
Channel 1
Data N
Channel 2
Data N
Channel 3
Data N
Channel 4
td(DATA_AV)
td(A)
50%
Figure 5. Timing of Continuous Conversion Mode (4-channel operation)
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