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參數(shù)資料
| 型號： | THS8133BCPHPG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| 封裝： | PLASTIC, HTQFP-48 |
| 文件頁數(shù)： | 10/25頁 |
| 文件大?。?/td> | 549K |
| 代理商： | THS8133BCPHPG4 |
THS8133, THS8133A, THS8133B
TRIPLE 10BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRILEVEL SYNC GENERATION
SLVS204C APRIL 1999 REVISED SEPTEMBER 2000
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
APPLICATION INFORMATION
SMPTE 274M (continued)
Table 9. THS8133 Signals for SMPTE 274M Compliant Operation on GBR and Y Channels
LEVEL
GBRY
SYNC
SYNC_T
BLANK
DAC INPUT
LEVEL
(mA)
(V)
SYNC
SYNC_T
BLANK
DAC INPUT
White
26.67
1.000
1
X
1
3FFh
Video
video+8.00
video+0.3
1
X
1
data
Sync Pos
16.00
0.600
0
1
X
xxxh
Black
8.00
0.3000
1
X
1
000h
Blank
8.00
0.3000
1
X
0
xxxh
Sync Neg
0
X
xxxh
In the YPbPr mode of this standard, the sync is centered around the center span of the video amplitude levels,
as shown in Figure 14. So the current for Pb and Pr is down-shifted with respect to Y to accommodate the
minimum data level at 0 mA. Thus, an input code of 00h corresponds now to an output drive of 0 mA while the
negative sync level is at 1.33 mA, corresponding to 50 mV. The Pb and Pr data input format is offset binary.
Table 10 lists the THS8133 full-scale output currents for Pb and Pr channels in the YPbPr operation mode of
the device. The operation mode corresponds to YPbPr with sync-on-all of Table 1.
Table 10. THS8133 Signals for SMPTE 274M Compliant Operation on Pb and Pr Channels
LEVEL
Pb, Pr
SYNC
SYNC_T
BLANK
DAC INPUT
LEVEL
(mA)
(V)
SYNC
SYNC_T
BLANK
DAC INPUT
Max
18.67
0.7000
1
X
1
3FFh
Video
video
1
X
1
data
Sync Pos
17.33
0.650
0
1
X
xxxh
Blank
9.33
0.350
1
X
0
xxxh
Sync Neg
1.33
0.050
0
x
xxxh
Min
0
1
X
1
000h
SMPTE 296M
This standard defines a raster scanning format of 1280x720 and an aspect ratio of 16:9, the analog and digital
representation, and the definition of an analog interface. Both GBR and YPbPr component color encoding can
be used.
With respect to the sync and video level definition, this standard is analogous to SMPTE 274M with the use of
a tri-level sync pulse. Therefore, for the generation of output signals compliant to this standard, refer to the
configuration of THS8133 for SMPTE 274M.
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相關(guān)代理商/技術(shù)參數(shù) |
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| THS8133BEVM | 制造商:Texas Instruments 功能描述:THS8133B TRIPLE 10BIT 80MSPS VID DAC EVM - Bulk |
| THS8133CPHP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
| THS8133TQFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
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| THS8134A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
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