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| 型號： | TLC32040I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ANALOG INTERFACE CIRCUITS |
| 中文描述： | 模擬接口電路 |
| 文件頁數(shù)： | 20/33頁 |
| 文件大?。?/td> | 453K |
| 代理商： | TLC32040I |
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TLC32040C, TLC32040I, TLC32041C, TLC32041I
ANALOG INTERFACE CIRCUITS
SLAS014E – SEPTEMBER 1987 – REVISED MAY 1995
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, V
CC+
= 5 V,
V
CC–
= –5 V, V
DD
= 5 V (unless otherwise noted)
total device, MSTR CLK frequency = 5.184 MHz, outputs not loaded
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
VOL
High-level output voltage
VDD = 4.75 V,
VDD = 4.75 V,
IOH = –300
μ
A
IOL = 2 mA
2.4
V
Low-level output voltage
0.4
V
ICC+
Supply current from VCC+
TLC3204_C
35
mA
TLC3204_I
40
ICC–
Supply current from VCC–
TLC3204_C
–35
mA
TLC3204_I
–40
IDD
Vref
∝
Vref
ro
Supply current from VDD
Internal reference output voltage
fMSTR CLK = 5.184 MHz
7
mA
3
3.3
V
Temperature coefficient of internal reference voltage
200
ppm/
°
C
k
Output resistance at REF
100
receive amplifier input
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
A/D converter offset error (filters bypassed)
25
65
mV
A/D converter offset error (filters in)
25
65
mV
CMRR
Common-mode rejection ratio at IN+, IN–, or AUX IN+,
AUX IN–
See Note 6
55
dB
rl
Input resistance at IN+, IN–, or AUX IN+,AUX IN–, REF
100
k
transmit filter output
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOO
Output offset voltage at OUT+, OUT–, (single-ended
relative to ANLG GND)
15
75
mV
VOM
Maximum peak output voltage swing across RL at OUT+
or OUT–, (single ended)
RL
≥
300
,
Offset voltage = 0
±
3
V
VOM
Maximum peak output voltage swing between RL at OUT+
and OUT–, (differential output)
RL
≥
600
±
6
V
system distortion specifications, SCF clock frequency = 288 kHz
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Attenuation of second harmonic of A/D
input signal
Single ended
VI
See Note 7
70
dB
Differential
ref,
62
70
Attenuation of third and higher harmonics
of A/D input signal
Single ended
VI = –0.5 dB to –24 dB referred to Vref,
See Note 7
65
dB
Differential
57
65
Attenuation of second harmonic of D/A
input signal
Single ended
VI = –0 dB to –24 dB referred to Vref,
See Note 7
70
dB
Differential
62
70
Attenuation of third and higher harmonics
of D/A input signal
Single ended
Differential
VI = –0 dB to –24 dB referred to Vref
See Note 7
65
65
dB
57
All typical values are at TA = 25
°
C.
NOTES:
6. The test condition is a 0-dBm, 1-kHz input signal with an 8-kHz conversion rate.
7. The test condition VI is a 1-kHz input signal with an 8-kHz conversion rate (0 dB relative to Vref). The load impedance for the DAC
is 600
.
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PDF描述 |
|---|---|
| TLC32041C | ANALOG INTERFACE CIRCUITS |
| TLC32041CFN | ANALOG INTERFACE CIRCUITS |
| TLC32041I | ANALOG INTERFACE CIRCUITS |
| TLC32040M | ANALOG INTERFACE CIRCUIT |
| TLC32040MFK | ANALOG INTERFACE CIRCUIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC32040IN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUITS |
| TLC32040M | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUIT |
| TLC32040MFK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUIT |
| TLC32040MJ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUIT |
| TLC32041C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUITS |
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