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參數(shù)資料
| 型號： | TLC32041C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ANALOG INTERFACE CIRCUITS |
| 中文描述： | 模擬接口電路 |
| 文件頁數(shù)： | 15/33頁 |
| 文件大小： | 453K |
| 代理商： | TLC32041C |
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TLC32040C, TLC32040I, TLC32041C, TLC32041I
ANALOG INTERFACE CIRCUITS
SLAS014E – SEPTEMBER 1987 – REVISED MAY 1995
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
asynchronous operation — more than one receive frame sync occurring between two receive frame syncs
When incrementally adjusting the conversion period via the A + A’ or A – A’ register options, a specific protocol
is followed. For both transmit and receive conversion periods, the incremental conversion period adjustment
is performed near the end of the conversion period. The command to use the incremental conversion period
adjust options is sent to the AIC during a FSX frame sync. The ongoing transmit conversion period is then
adjusted. However, three possibilities exist for the receive conversion period adjustment in the diagram as
shown in the following figure. If the adjustment command is issued during transmit conversion period A, receive
conversion period A is adjusted if there is sufficient time between t
1
and t
2
. Or, if there is not sufficient time
between t
1
and t
2
, receive conversion period B is adjusted. Or, the receive portion of an adjustment command
can be ignored if the adjustment command is sent during a receive conversion period, which is already being
or is adjusted due to a prior adjustment command. For example, if adjustment commands are issued during
transmit conversion periods A, B, and C, the first two commands can cause receive conversion periods A and
B to be adjusted, while the third receive adjustment command is ignored. The third adjustment command is
ignored since it was issued during receive conversion period B, which already is adjusted via the transmit
conversion period B adjustment command.
Transmit
Conversion
Period A
Receive Conversion Period A
FSX
FSR
Transmit
Conversion
Period B
Transmit
Conversion
Period C
t1
t2
Receive Conversion Period B
asynchronous operation — more than one set of primary and secondary DX serial communication occurring
between two receive frame sync (see AIC DX data word format section)
The TA, TA’, TB, and control register information that is transmitted in the secondary communications is always
accepted and is applied during the ongoing transmit conversion period. If there is sufficient time between t
1
and
t
2
, the TA, RA’, and RB register information, which is sent during transmit conversion period A, is applied to
receive conversion period A. Otherwise, this information is applied during receive conversion period B. If RA,
RA’, and RB register information has already been received and is being applied during an ongoing conversion
period, any subsequent RA, RA’, or RB information that is received during this receive conversion period is
disregarded (see diagram below).
FSX
FSR
Transmit
Conversion
Period A
Transmit
Conversion
Period B
Transmit
Conversion
Period C
t1
t2
Primary
Secondary
Primary
Secondary
Primary
Secondary
Receive Conversion
Period A
Receive Conversion Period B
相關PDF資料 |
PDF描述 |
|---|---|
| TLC32041CFN | ANALOG INTERFACE CIRCUITS |
| TLC32041I | ANALOG INTERFACE CIRCUITS |
| TLC32040M | ANALOG INTERFACE CIRCUIT |
| TLC32040MFK | ANALOG INTERFACE CIRCUIT |
| TLC32040MJ | ANALOG INTERFACE CIRCUIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLC32041CFN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUITS |
| TLC32041CN | 制造商:TI 功能描述:32041 |
| TLC32041I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUITS |
| TLC32041IN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE CIRCUITS |
| TLC32042EFN | 制造商:Rochester Electronics LLC 功能描述: |
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