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參數(shù)資料
| 型號(hào)： | TLC32046M |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Wide-Band Analog Interface Circuit |
| 中文描述： | 寬帶模擬接口電路 |
| 文件頁數(shù)： | 15/57頁 |
| 文件大小： | 297K |
| 代理商： | TLC32046M |
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2–1
2
Detailed Description
Table 2–1. Mode-Selection Function Table
CONTROL
REGISTER
BIT (D5)
DATA-DR/
CONTROL
(Terminal 13)
FSD/
WORD-BYTE
(Terminal 1)
OPERATING
MODE
SERIAL
CONFIGURATION
DESCRIPTION
Data in
(0 V to 5 V)
FSD out
(0 V to 5 V)
1
Dual Word
(Telephone
Interface)
Synchronous,
One 16-Bit Word
Terminal functions DATA-DR,
FSD, D11OUT, and D10OUT
are applicable in this
configuration. FSD is asserted
during secondary
communication, but FSR is not
asserted. However, FSD
remains high during primary
communication.
Terminal functions DATA-DR ,
FSD, D11OUT, and D10OUT
are applicable in this
configuration. FSD is asserted
during secondary
communication, but FSR is not
asserted. However, FSD
remains high during primary
communication. If secondary
communications occur while
the A/D conversion is being
transmitted from DR, FSD
cannot go low, and data from
DATA-DR cannot go onto DR.
Terminal functions
CONTROL, WORD-BYTE,
EODR, and EODX are
applicable in this configuration.
Terminal functions
CONTROL, WORD-BYTE,
EODR, and EODX are
applicable in this configuration.
Terminal functions
CONTROL, WORD-BYTE,
EODR, and EODX are
applicable in this configuration.
Terminal functions
CONTROL, WORD-BYTE,
EODR, and EODX are
applicable in this configuration.
Data in
(0 V to 5 V)
FSD out
(0 V to 5 V)
0
Dual Word
(Telephone
Interface)
Synchronous,
One 16-Bit Word
VCC+
1
WORD
Synchronous,
One 16-Bit Word
VCC–
0
Asynchronous,
One 16-bit Word
VCC–
1
BYTE
Synchronous,
Two 8-Bit Bytes
0
Asynchronous,
Two 8-Bit Bytes
DATA-DR/CONTROL has an internal pulldown resistor to –5 V, and FSD/WORD-BYTE has an internal pullup resistor
to 5 V.
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