參數(shù)資料
型號(hào): TLC32046M
廠商: Texas Instruments, Inc.
英文描述: Wide-Band Analog Interface Circuit
中文描述: 寬帶模擬接口電路
文件頁數(shù): 17/57頁
文件大?。?/td> 297K
代理商: TLC32046M
2–3
See Table 2-3
See Table 2-3
See Table 2-3
See Table 2-3
7.20 kHz for RB = 40
8.00 kHz for RB = 36
9.60 kHz for RB = 30
14.4 kHz for RB = 20
16.0 kHz for RB = 18
19.2 kHz for RB = 15
7.20 kHz for TB = 40
8.00 kHz for TB = 36
9.60 kHz for TB = 30
14.4 kHz for TB = 20
16.0 kHz for TB = 18
19.2 kHz for TB = 15
Divide By 2
XTAL
OSC
20.736 MHZ
41.472 MHZ
TA Register
(5 Bits)
Divide By 2
576 kHz
TB Register
(6 Bits)
RA Register
(5 Bits)
576 kHz
Divide By 4
1.296 MHz
2.592 MHz
5.184 MHz
10.368 MHz
MASTER CLOCK
TMS320 DSP
SHIFT CLOCK
TA
REGISTER
(6 Bits)
2s-Complement TA
See Table 2-3
Adder/Subtractor
D1
0
0
1
1
1
See Table 2-2
0
1
0
TA
TA + TA
TA – TA
TA
TX (A) Counter
(6 Bits)
TX (B) Counter
288 kHz
SCF CLOCK
Low-Pass Filter,
(sin x)/x Filter
D/A Conversion
Frequency
RA
Register
(6 Bits)
2s-Complement RA
See Table 2-3
Adder/Subtractor
RX (A) Counter
(6 Bits)
D
0
0
1
1
1
See Table 2-2
0
1
0
RA
RA + RA
RA – RA
RA
RB Register
(6 Bits)
RX (B) Counter
High-Pass Filter,
A/D Conversion
Frequency
288 kHz
Low-Pass Filter
SCF CLOCK
9
18
9
18
Transmit Section
D/A Conversion
Timing
Receive Section
A/D Conversion
Timing
These control bits are described in the DX Serial Data Word Format section.
NOTES: A. Tables 2–2 and 2–3 are primary and secondary communication protocols, respectively.
B. In synchronous operation, RA, RA’, RB, RX(A), and RX(B) are not used. TA, TA’, TB, TX(A), and TX(B) are
used instead.
C. Items in italics refer only to frequencies and register contents, which are variable. A crystal oscillator driving
20.736 MHz into the TMS320-series DSP provides a master clock frequency of 5.184 MHz. The TLC32046
produces a shift clock frequency of 1.296 MHz. If the TX(A) register contents equal 9, the SCF clock
frequency is 288 kHz, and the D/A conversion frequency is 288 kHz
÷
T(B).
Figure 2–1. Asynchronous Internal Timing Configuration
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