參數(shù)資料
型號： TLC320AC01C
廠商： Texas Instruments, Inc.
英文描述： Single-Supply Analog Interface Circuit
中文描述： 單電源模擬接口電路
文件頁數(shù)： 44/84頁
文件大?。?/td> 447K
代理商： TLC320AC01C
3–5
3.5.7
Noise, Low-Pass and Band-Pass Switched-Capacitor Filters Included,
V
DD
= 5 V (Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC idle channel noise
ADC idle-channel noise
Inputs tied to ADC VMID,
fs = 8 kHz, FCLK = 144 kHz,
(see Note 11)
180
300
DAC idle channel
DAC idle-channel
noise
Broad-band noise
DIN INPUT = 00000000000000,
DIN INPUT 00000000000000,
fs = 8 kHz, FCLK = 144 kHz,
(see Note 12)
180
300
μ
Vrms
Noise (0 to 7.2 kHz)
Noise (0 to 3.6 kHz)
180
180
300
300
All typical values are at VDD = 5 V and TA = 25
°
C.
NOTES: 11. The ADC channel noise is calculated by taking the RMS value of the digital output codes of the ADC
channel and converting to microvolts.
12. The DAC channel noise is measured differentially from OUT+ to OUT– across 600
.
Absolute Gain Error, V
DD
= 5 V, f
s
= 8 kHz
(Unless Otherwise Noted)
PARAMETER
ADC channel absolute gain error (see Note 13)
–1-dB input signal
0-dB input signal,
RL = 600
NOTES: 13. ADC absolute gain error is the variation in gain from the ideal gain over the specified input signal levels.
The gain is measured with a –1-dB, 1020-Hz sine wave. The –1-dB input signal allows for any positive gain
or offset error that may affect gain measurements at or close to 0-dB input signal levels.
14. The DAC input signal is the digital equivalent of a 1020-Hz sine wave (full-scale analog output at digital full-
scale input = 0 dB). The nominal differential DAC channel output voltage with this input condition is 6 V peak
to peak. The load impedance for the DAC output buffer is 600
from OUT+ to OUT–.
3.5.8
TEST CONDITIONS
MIN
MAX
±
1
UNIT
TA = –40 – 85
°
C
DAC channel absolute gain error (see Note 14)
TA = –40 – 85
°
C
±
1
dB
3.5.9
Relative Gain and Dynamic Range, V
DD
= 5 V, f
s
= 8 kHz (Unless Otherwise
Noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
ADC channel relative gain tracking error
(see Note 15)
–48-dB to –1-dB input signal range
±
0.2
dB
DAC channel relative gain tracking error
(see Note 16)
–48-dB to 0-dB input signal range
RL(diff) = 600
±
0.2
NOTES: 15. ADC gain tracking is the ratio of the measured gain at one ADC channel input level to the gain measured
at any other input level. The ADC channel input is a –1-dB 1020-Hz sine wave input signal. A –1-dB input
signal allows for any positive gain or offset error that may affect gain measurements at or close to 0-dB ADC
input signal levels.
16. DAC gain tracking is the ratio of the measured gain at one DAC channel digital input level to the gain
measured at any other input level. The DAC-channel input signal is the digital equivalent of a 1020-Hz sine
wave (digital full scale = 0 dB). The nominal differential DAC channel output voltage with this input condition
is 6 V peak to peak. The load impedance for the DAC output buffer is 600
from OUT+ to OUT–.
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TLC320AC01CPM 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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