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參數(shù)資料
| 型號： | TLC320AD50I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION |
| 中文描述： | sigma - delta模擬接口，具有大師電路，從功能 |
| 文件頁數(shù)： | 15/84頁 |
| 文件大?。?/td> | 447K |
| 代理商： | TLC320AD50I |
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1–8
1.5
There are nine data registers that are used as follows:
Register Functional Summary
Register 0
The No-op register. The 0 address allows phase adjustments to be made without
reprogramming a data register.
Register 1
The A register controls the count of the A counter.
Register 2
The B register controls the count of the B counter.
Register 3
The A
′
register controls the phase adjustment of the sampling period. The adjustment is
equal to the register value multiplied by the input master period.
Register 4
The amplifier gain register controls the gains of the input, output, and monitor amplifiers.
Register 5
The analog configuration register controls:
The addition/deletion of the high-pass filter to the ADC signal path
The enable/disable of the analog loopback
The selection of the regular inputs or auxiliary inputs
The function that allows processing of signals that are the sum of the regular inputs and
the auxiliary inputs (V
IN
+ V
AUX IN
)
The digital configuration register controls:
Register 6
Selection of the free-run function
FSD [frame-synchronization (sync) delay] output enable/disable
Selection of 16-bit function
Forcing secondary communications
Software reset
Software power down
Register 7
The frame-sync delay register controls the time delay between the master-device frame
sync and slave-device frame sync. Register 7 must be the last register programmed when
using slave devices since all register data is latched and valid on the sixteenth falling edge
of SCLK. On the sixteenth falling edge of SCLK, all delayed frame-sync intervals are shifted
by this programmed amount.
Register 8
The frame-sync number register informs the master device of the number of slaves that are
connected in the chain. The frame-sync number is equal to the number of slaves plus one.
相關PDF資料 |
PDF描述 |
|---|---|
| TLC320AD535C | DUAL CHANNEL VOICE/DATA CODEC |
| TLC320AD535C-I | DUAL CHANNEL VOICE/DATA CODEC |
| TLC320AD535I | DUAL CHANNEL VOICE/DATA CODEC |
| TLC320AC02I | Single-Supply Analog Interface Circuit |
| TLC320AD50IPT | SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLC320AD50IDW | 功能描述:接口—CODEC SNGL CH Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AD50IPT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION |
| TLC320AD52CDW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION |
| TLC320AD52CPT | 功能描述:IC ANALOG INTERFACE W/MS 48-LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率（位）:15 b ADC / DAC 數(shù)量:1 / 1 三角積分調變:是 S/N 比，標準 ADC / DAC (db):- 動態(tài)范圍，標準 ADC / DAC (db):- 電壓 - 電源，模擬:2.7 V ~ 3.3 V 電壓 - 電源，數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-VFBGA 供應商設備封裝:80-BGA MICROSTAR JUNIOR（5x5） 包裝:帶卷 (TR) 其它名稱:296-21257-2 |
| TLC320AD535 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC |
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