參數(shù)資料
型號(hào)： TLC34076M-135
廠商： Texas Instruments, Inc.
英文描述： Color-Palette(135MHz,與TLC34075兼容，另具24位和16位真彩色模式)
中文描述： 顏色調(diào)色板（135MHz，與TLC34075兼容，另具24位和16位真彩色模式）
文件頁(yè)數(shù)： 24/57頁(yè)
文件大小： 456K
代理商： TLC34076M-135
2–8
2.4.2
In addition to the VGA pass-through mode, there are four multiplexing modes available, all of which are
referred to as normal modes. In each normal mode, a pixel bus width of 8, 16, or 32 bits may be used.
Modes 1, 2, and 3 also support a pixel bus width of 4 bits. Data should always be presented on the least
significant bits of the pixel bus. For example, when a 16-bit-wide pixel bus is used and there are 8 bits per
pixel, each 8-bit pixel should be presented on P<0:7>. All the unused pixel bus pins should be connected
to GND.
Multiplexing Modes
Mode 1 uses a single bit plane to address the color palette. The pixel port bit is fed into bit 0 of the palette
address, with the 7 high-order address bits being defined by the palette-page register (see Section 2.2.3).
This mode has uses in high-resolution monochrome applications such as desktop publishing. This mode
allows the maximum amount of multiplexing (a 32:1 ratio), thus giving a pixel bus rate of only 4 MHz at a
screen resolution of 1280 by 1024. Although only a single bit plane is used, alteration of the palette-page
register at the line frequency allows 256 different colors to be displayed simultaneously with 2 colors per
line.
Mode 2 uses two bit planes to address the color palette. The two bits are fed into the low-order address bits
of the palette with the six high-order address bits being defined by the palette-page register (see
Section 2.2.3). This mode allows a maximum divide ratio of 16:1 on the pixel bus and is a 4-color alternative
to mode 1.
Mode 3 uses four bit planes to address the color palette. The four bits are fed into the low-order address
bits of the palette with the 4 high-order address bits being defined by the palette-page register (see
Section 2.2.3). This mode provides 16 pages of 16 colors and can be used at SCLK divide ratios of 1 to 8.
Mode 4 uses eight bit planes to address the color palette. Since all eight bits of palette address are specified
from the pixel port, the page register is not used. This mode allows dot-clock-to-SCLK ratios of 1:1 (8-bit
bus), 2:1 (16-bit bus) or 4:1 (32-bit bus). Therefore, in a 32-bit configuration, a 1024-by-768 pixel screen can
be implemented with an external data rate of only 16 MHz.
All normal multiplexing modes can support little-endian (default) and big-endian data formats at the pixel
bus inputs (see section 2.6.1).
2.4.3
Mode 5 is special nibble mode, which is enabled when the general-control register SNM bit (bit 3) is set to
1 and the general-control register SSRT bit (bit 2) is set to 0 (see Section 2.11). When the special nibble
mode is enabled, it takes precedence over the other modes, and the multiplex-control-register setup is
ignored. The SFLAG/NFLAG input is then used as a nibble flag to indicate which nibble of each byte holds
the pixel data. Special nibble mode is a variation of the 4-bit pixel mode with a 16-bit pixel width. All 32 inputs
(P0 through P31) are connected as 4 bytes, but the 16-bit data bus is composed of either the lower or upper
nibble of each of the 4 bytes. For more detailed information, refer to Section 2.9.2. Since this mode uses
4 bit planes for each pixel, they are fed into the low-order address bits of the palette, with the four high-order
address bits defined by the palette-page register (see Section 2.2.3).
Special Nibble Mode
2.4.4
Mode 6 is the true-color mode in which 24, 16, or 15 bits of data are transferred from the pixel port directly
to the DACs, but with the same amount of pipeline delay as the overlay data and the control signals (BLANK
and SYNCs). Depending on which true-color mode is selected, overlay is provided by utilizing the remaining
bits of the pixel bus to address the palette RAM (refer to Tables 2–6 and 2–7). This results in a 24-bit RAM
output that is then used as overlay information to the DACs. When all the overlay inputs are at logic 0, no
overlay information is displayed. When a non-zero value is input, the color-palette RAM is addressed and
the resulting data is then fed through to the DACs and receives priority over the true-color data.
True-Color Modes
Mode 6a is the TARGA-compatible (5-5-5) true-color mode. In this 16-bit mode, there are 5 bits of red,
5 bits of green, 5 bits of blue, and an additional overlay bit. Refer to Table 2–8 for the exact bit definitions.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLC34077 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette Data Manual
TLC34077135FN 制造商:TI 功能描述:*
TLC352 制造商:TI 制造商全稱:Texas Instruments 功能描述:LinCMOSE DUAL DIFFERENTIAL COMPARATOR
TLC352CD 功能描述:校驗(yàn)器 IC Dual Differential RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel
TLC352CDG4 功能描述:校驗(yàn)器 IC Dual Low Vltg LinCMOS Differential RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel
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