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參數(shù)資料
| 型號： | TLC5618CDR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 480K |
| 代理商： | TLC5618CDR |
TLC5618, TLC5618A
PROGRAMMABLE DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS156G – JULY 1997 – REVISED APRIL 2001
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
power-supply bypassing and ground management
Printed-circuit boards that use separate analog and digital ground planes offer the best system performance.
Wire-wrap boards do not perform well and should not be used. The two ground planes should be connected
together at the low-impedance power-supply source. The best ground connection may be achieved by
connecting the DAC AGND terminal to the system analog ground plane making sure that analog ground
currents are well-managed.
A 0.1-
F ceramic bypass capacitor should be connected between VDD and AGND and mounted with short leads
as close as possible to the device. Use of ferrite beads may further isolate the system analog and digital power
supplies.
Figure 26 shows the ground plane layout and bypassing technique.
0.1
F
Analog Ground Plane
1
2
3
4
8
7
6
5
Figure 26. Power-Supply Bypassing
saving power
Setting the DAC register to all 0s minimizes power consumption by the reference resistor array and the output
load when the system is not using the DAC.
ac considerations/analog feedthrough
Higher frequency analog input signals may couple to the output through internal stray capacitance. Analog
feedthrough is tested by holding CS high, setting the DAC code to all 0s, sweeping the frequency applied to
REFIN, and monitoring the DAC output.
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