參數(shù)資料
型號: TLC876CPWLE
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: TSSOP-28
文件頁數(shù): 8/23頁
文件大?。?/td> 305K
代理商: TLC876CPWLE
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140C – JULY 1997 – REVISED MAY 1999
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
dc considerations (continued)
5
5
RARRAY
500
C (Equivalent)
CLK
TLC876
REFTF
REFTS
REFBS
REFBF
DAC
10
5
5
5
10
5
5
5
Figure 17. TLC876 Equivalent Reference Structure
The REFTS and REFBS terminals should not be connected in configurations that do not use a force-sense
reference. Connecting the force and sense lines together allows current to flow in the sense lines. Any current
allowed to flow through these lines must be negligibly small. Current flow causes voltage drops across the
resistance in the sense lines. Because the internal DACs tap different points along the sense lines, each DAC
would receive a slightly different reference voltage if current were flowing in these lines. To avoid this undesirable
condition, leave the sense lines unconnected. Any current allowed to flow through these lines must be negligibly
small (< 100
A).
The voltage drop across the internal resistor array (RARRAY) determines the input span. The nominal differential
voltage is 2 Vpp. The full-scale input span is given by equation 3.
Input Voltage Span = V(REFTS) – V(REFBS)
(3)
Therefore, a full-scale input span is approximately 2 V when [V(REFTS) – V(REFBS)] = 2 V. The external
reference must provide approximately 4 mA for a 2-V drop across the internal resistor array.
Figure 18 shows the flexibility in determining both the full-scale span of the analog input and where to center
this voltage without degrading the typical performance.
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